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jeremiah-c-leary / vhdl-style-guide

Style guide enforcement for VHDL
GNU General Public License v3.0
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Rules to enforce case on `in` keywords if for loops/generates #1273

Open JHertz5 opened 4 hours ago

JHertz5 commented 4 hours ago

Is your feature request related to a problem? Please describe. I'd like rules to enforce case on the in keyword in for loops/generates, e.g. correcting this:

my_loop : for lv_thing IN t_things loop
my_gen : for lv_thing IN t_things generate

to this

my_loop : for lv_thing in t_things loop
my_gen : for lv_thing in t_things generate
JHertz5 commented 4 hours ago

I'm planning to raise a PR for this. FYI @urbite.