Create a unit test for inst32_jformat UVM object

jerralph / riscv-vip

For pre-silicon developers of RISC-V systems, riscv-vip is a SystemVerilog project that helps with pre-si verification and debug

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Create a unit test for inst32_jformat UVM object #22

Closed jerralph closed 5 years ago

jerralph commented 5 years ago

The existing instruction_unittest.sv has testing for many different things including decoder.svh, and all the classes that were originally in instruction.svh and are now in the UVM classes for inst32, inst32format, where = i,s,r,b,u,j. These classes, now in their own files, should have their own unit test file.

jerralph commented 5 years ago

Done as of 4deddce1f25b3fc6f861aeefd258b600cb1b1b9e. closing