Closed ledvinap closed 7 years ago
First commit: I still get lots of underruns, and configurator is complaining about various errors once again.
Trying the second one...
Ah, I already had this removed with the 1st commit. Same symptom.
And the error is FEIF only ? or are other flags set too ?
Ah, I have to re-install the debug counter again to check other errors.
But there's something else that is very interesting.
I added the reenable code again, and guess what, I only see occasional FEIF then.
I will push the branch separately.
Using pins for trace (+saleae) may be helpful ... it may reveal when the error occurs ..
(https://github.com/ledvinap/cleanflight/blob/local/src/main/drivers/pin_debug.h, but that ais a bit of overkill)
'reenable code' ? What do you mean?
At the beginning of the uartTryStartTxDMA:
if (s->txDMAStream->NDTR)
goto reenable;
then jumps to USART_DMACmd(DISABLE).
Yes, enabling DMA again should mask the problem (probably even without corrupting data, FIFO error is raised befor UART register is written). But what is causing the buffer underflow?
What happens when DMA priority is increased? https://github.com/jflyper/cleanflight/blob/0cc47aa1a6377adf3dd30888584ac0308120c851/src/main/drivers/serial_uart.c#L162
(sorry, I have to leave today)
That's for rx... you meant tx, right?
Thanks for helping me!!! 👍 I'll get some sleep also. 😴
Yes, Tx channel ...
Pushed few changes, mostly cosmetic. Removed code that disables USART DMA before enabling DMA
Can you test this code? its USART_DMACmd + minor code cleanup ...