jgrivera67 / HiRTOS

HiRTOS: a high-integrity multi-core RTOS kernel and separation kernel written in SPARK Ada
Apache License 2.0
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Would this be suitable for an ARMv7 device? (NXP S32K344) #14

Open photex opened 6 months ago

photex commented 6 months ago

Hello!

I've just gotten a blank Ada program flashed to my S32K344 eval board (https://www.nxp.com/document/guide/getting-started-with-mr-canhubk344-evaluation-board:GS-MR-CANHUBK344).

I'd be interested to try to get HiRTOS working on this device if I only knew how to proceed or if it's even intended to work on this class of device. :D

jgrivera67 commented 6 months ago

Hello!

I've just gotten a blank Ada program flashed to my S32K344 eval board (https://www.nxp.com/document/guide/getting-started-with-mr-canhubk344-evaluation-board:GS-MR-CANHUBK344).

I'd be interested to try to get HiRTOS working on this device if I only knew how to proceed or if it's even intended to work on this class of device. :D

Hi Chip,

Thanks for your interest in using HiRTOS. You would need to port the platform-dependent parts to your corresponding CPU architecture (ARMv7-M, since your board has a Cortex-M7) and board. I'm currently doing a new port for a RISCV board. Similar files would need to be created for your new port. Below are the new files I have created for the new port I'm working on:

$ tree src/porting_layer/cpu_architectures/riscv32/
src/porting_layer/cpu_architectures/riscv32/        <--------- CPU architecture-specific code
├── hirtos_cpu_arch_interface.adb
├── hirtos_cpu_arch_interface-interrupt_controller.adb
├── hirtos_cpu_arch_interface-interrupt_controller.ads
├── hirtos_cpu_arch_interface-interrupt_handling.adb
├── hirtos_cpu_arch_interface-memory_protection.adb
├── hirtos_cpu_arch_interface-memory_protection.ads
├── hirtos_cpu_arch_interface_private.ads
├── hirtos_cpu_arch_interface-thread_context.adb
├── hirtos_cpu_arch_interface-thread_context.ads
├── hirtos_cpu_arch_interface-tick_timer.adb
├── hirtos_cpu_arch_interface-tick_timer.ads
├── hirtos_cpu_arch_parameters.ads
├── hirtos_cpu_multi_core_interface.adb
├── hirtos_cpu_startup_asm.S
└── hirtos_cpu_startup_interface.adb

0 directories, 15 files
$ tree src/porting_layer/platforms/esp32_c3/           <--------- board-specific code
src/porting_layer/platforms/esp32_c3/
├── hirtos_cpu_arch_interface-interrupts.ads
├── hirtos_low_level_debug_interface.adb
├── hirtos_platform_parameters.ads
├── third_party
│   └── svd_generated.       <--------- Files generated with svd2ada (not all are needed for the port)
│       ├── esp32-c3.ads
│       ├── esp32-c3-aes.ads
│       ├── esp32-c3-apb_ctrl.ads
│       ├── esp32-c3-apb_saradc.ads
│       ├── esp32-c3-assist_debug.ads
│       ├── esp32-c3-bb.ads
│       ├── esp32-c3-dma.ads
│       ├── esp32-c3-ds.ads
│       ├── esp32-c3-efuse.ads
│       ├── esp32-c3-extmem.ads
│       ├── esp32-c3-gpio.ads
│       ├── esp32-c3-gpiosd.ads
│       ├── esp32-c3-hmac.ads
│       ├── esp32-c3-i2c.ads
│       ├── esp32-c3-i2s.ads
│       ├── esp32-c3-interrupt_core0.ads
│       ├── esp32-c3-io_mux.ads
│       ├── esp32-c3-ledc.ads
│       ├── esp32-c3-rmt.ads
│       ├── esp32-c3-rng.ads
│       ├── esp32-c3-rsa.ads
│       ├── esp32-c3-rtc_cntl.ads
│       ├── esp32-c3-sensitive.ads
│       ├── esp32-c3-sha.ads
│       ├── esp32-c3-spi0.ads
│       ├── esp32-c3-spi1.ads
│       ├── esp32-c3-spi2.ads
│       ├── esp32-c3-system.ads
│       ├── esp32-c3-systimer.ads
│       ├── esp32-c3-timg.ads
│       ├── esp32-c3-twai.ads
│       ├── esp32-c3-uart.ads
│       ├── esp32-c3-uhci.ads
│       ├── esp32-c3-usb_device.ads
│       └── esp32-c3-xts_aes.ads
├── uart_driver.adb
└── uart_driver.ads

2 directories, 40 files
$ 

That is, basically, you would need to implement platform-specific code for the MPU, the interrupt controller, a timer and the UART of your platform.

Please base your work on the Development branch which is the most upto date.

Thanks and regards,

Germán