Closed limccart7 closed 21 hours ago
SX1262 - MBED Shield
I do wonder about the reliability of the connection you have between the RPi and an Arduino shield. A loose wire could easily explain this behavior.
Had to set SX126x::XTAL = true
That can be expected, considering the shield does have an XTAL instead of the more common TCXO, it is specified on the website you have linked to. However, your code does not show this ...?
I really wish I could provide more information or context as to why it stopped working
You can - start by following the issue template. One of the things it calls for is to specify the library version you are using, which for me is a critical piece of information. Next up, post the output. You have some prints in the program, do they show up? Even just seeing a successful startup is very important to me. Without it I have no idea whether the program crashes at some point or continues running, waiting for the interrupt.
Most importantly: what is your transmitter? Does its configuration match the receiver? And can you independently verify something is actually being sent? You seem to be using LoRaWAN sync word, which really shouldn't be used for peer-to-peer traffic, assuming that is what you're trying to do.
Also, regarding your code: you can use getPacketLength
to get ... well, the packet length, instead of trying to figure it out from the NULL terminator position.
I apologize for not using the issue template or providing the necessary information. I believe this would be a module not working issue, so I will follow that template.
Sketch that is causing the module fail rx.cpp - I made a few changes. I was changing XTAL=true in the SX126x.cpp file (terrible practice I know), but changed it to just set txcoVoltage=0 and that was working as well until today. Now with the exact same code and pinout, I'm getting -707.
```c++
#include
```c++
#include
Also, I have an update regarding the behavior with FSK. I spoke with my partner who has handled the FSK and his receiver IS working for FSK on his machine, but not (any of) mine. As you can see, I was trying to swap between FSK and LoRa to see if either would work. The transmitter code is taken directly from him.
We were able to verify transmitting LoRa packets using a handheld Spectrum Analyzer and/or a Software Defined Radio. We were able to detect and read packets from the 1262 a few weeks ago.
Hardware setup I can provide pictures if need be, but I want to use this section to address some things you brought up.
SX1262 - MBED Shield
I do wonder about the reliability of the connection you have between the RPi and an Arduino shield. A loose wire could easily explain this behavior.
I completely agree with this, and wish I could've chosen the hardware myself since both the Pi and Hat layout are not ideal. That being said we've double and even triple checked this with logic analyzers and replacing any wire that feels even the slightest bit loose. Between my partner and I, we have 4+ of these setups that we've been testing on which gives us a little bit of a sanity check when all 4 are not functioning for one thing. He is having the same problem with LoRa as I am, but is able to transmit and receive FSK. I also was able to transmit LoRa which leads me to believe that at least some of the pins are working. We at first believed it was an issue with our DIO1 or BUSY Pins, but DIO1 still goes high when receiving on FSK. A final note, my partner bought a different 1262 hat specifically for the RPi pinout, so there were no jumper wires, and it still was not receiving LoRa.
```BASH [SX1262] Initializing ... RLB_DBG: RadioLib Info Version: "6.6.0.0" Platform: "Generic" Compiled: "Aug 30 2024" "17:02:09" RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO 0 0 RLB_DBG: -2 at /home/limccart/SX12XX_Project/lora_src/RadioLib/src/Module.cpp:277 RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDR 1D 3 20 RLB_SPI: SI 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 53 58 31 32 36 31 20 56 32 44 20 32 44 30 32 0 RLB_DBG: Found SX126x: RADIOLIB_SX126X_REG_VERSION_STRING: RLB_DBG: 00000320: 53 58 31 32 36 31 20 56 32 44 20 32 44 30 32 00 SX1261 V2D 2D02. RLB_DBG: RLB_DBG: M SX126x RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO FF FF RLB_DBG: -2 at /home/limccart/SX12XX_Project/lora_src/RadioLib/src/Module.cpp:277 RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 8A RLB_SPI: SI 1 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 93 RLB_SPI: SI 20 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 88 RLB_SPI: SI 3 16 A 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 8 RLB_SPI: SI 0 0 0 0 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 89 RLB_SPI: SI 7F RLB_SPI: SO A2 A2 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW 8B RLB_SPI: SI 9 6 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW D 7 40 RLB_SPI: SI 14 24 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 8 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 96 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDW D 8 E7 RLB_SPI: SI 18 RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 9D RLB_SPI: SI 1 RLB_SPI: SO A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 8 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 8 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW 8B RLB_SPI: SI C 6 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW 8B RLB_SPI: SI C 5 1 1 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDW 98 RLB_SPI: SI E1 E9 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 86 RLB_SPI: SI 39 30 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 1D 8 D8 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 C8 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 8 D8 RLB_SPI: SI DE RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDR 1D 8 E7 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 18 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW 95 RLB_SPI: SI 4 7 0 1 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDW 8E RLB_SPI: SI A 4 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW D 8 E7 RLB_SPI: SI 18 RLB_SPI: SO A2 A2 A2 A2 success! [SX1262] Starting to listen ... RLB_SPI: CMDW 8 RLB_SPI: SI 2 62 0 2 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 8 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 82 RLB_SPI: SI FF FF FF RLB_SPI: SO A2 A2 A2 A2 success! ```
Notes: I know it's unhelpful to hear, but I swear I was not getting "-2" when I was running this same code yesterday. I do think this is a SPI issue (as per your Troubleshooting Guide), but I was hoping you could help me understand what's happening better. To further my point, I know you couldn't see what the receiver was printing yesterday, but it would print
[SX1262] Initializing ... success!
[SX1262] Starting to listen ... success!
Now it prints:
[SX1262] Initializing ... success!
[SX1262] Starting to listen ... failed, code -707
No change to any code. Just a different day and a restart of my Pi. I know this probably leads you to believe it's a wiring issue, but I triple checked that nothing got loose, and it's the exact same as yesterday.
Additional info (please complete):
Thank you for the additional information, I have a couple of observations:
I made a few changes. I was changing XTAL=true in the SX126x.cpp file (terrible practice I know)
Terrible indeed - but why change it in the library source? SX126x::XTAL
is a public member variable, you can set it from your main file, that's why it is public.
Now with the exact same code and pinout, I'm getting -707
How are you compiling the library and your main files? If you are installing the library on your machine, you will have to recompile it each time you change it. So if you did some changes to the library source, you will have to reinstall the library, otherwise you are still using the unchanged version.
Seeing as you have shown two .cpp files, I'm guessing you have two Raspberry Pi computers, one running rx, the other running tx, correct?
A final note, my partner bought a different 1262 hat specifically for the RPi pinout, so there were no jumper wires, and it still was not receiving LoRa.
It's always possible some bug got introduced recently. Are you using the 6.6.0.0 update, or the latest master? And did you update the library since it worked last?
I was not getting "-2" when I was running this same code yesterday
The -2 in the log is from an assertion - during initialization, the module returns 0xFF
which gets evaluated as a faulty SPI. It is strange this appears after the SPI was working, as the library can read the SX126x version. It seems like this did not cause any further issue, and the SPI appears to be working afterwards, but it is strange nonetheless. Are there any other programs running on the RPi that could be using the SPI?
Please forgive me if this is unrelated to the issue here, but I have numerous Pi-Pico boards working great w/ both straight LoRa as well as for LoRaWAN comms, so I wanted to reply here in case my setup is of any assistance.
My LoRa add-on for the Pico is:
https://www.waveshare.com/pico-lora-sx1262-868m.htm
... and after a great deal of help here from the RadioLib folks, found that the following sequence worked flawlessly for me.
Prior to any int state = radio.begin();
statements, you need:
SX1262 radio = new Module(3, 20, 15, 2, SPI1, RADIOLIB_DEFAULT_SPI_SETTINGS);
... and then:
SPI1.setSCK(10); // fix from https://github.com/jgromes/RadioLib/issues/729
SPI1.setTX(11); // ~
SPI1.setRX(12); // ~
pinMode(3, OUTPUT); // ~
digitalWrite(3, HIGH); // ~
SPI1.begin(false); // fix from https://github.com/jgromes/RadioLib/issues/729
... and to make sure I'm not leaving out anything critical, regarding the conventional LoRa parameters (freq, BW, SF, etc.), when using LoRaWAN that will be handled by the option you have selected in:
const LoRaWANBand_t Region =
... and when using this hardware for 'plain' LoRa comms, those parameters are set directly in your code w/ something like:
// modem configuration
#define FREQUENCY 433.000 //
#define BANDWIDTH 125.0 // Sets LoRa bandwidth. Allowed values are 7.8, 10.4, 15.6, 20.8, 31.25, 41.7, 62.5, 125.0, 250.0 and 500.0 kHz.
#define SPREADING_FACTOR 7 // Sets LoRa spreading factor. Allowed values range from 5 to 12.
#define CODING_RATE 5 // Sets LoRa coding rate 4/x denominator. Allowed x values range from 5 to 8.
#define CURRENT_LIMIT 140 // mA
#define OUTPUT_POWER 22 // dBm
#define LORA_PREAMBLE_LEN 8 // preambleLength LoRa preamble length in symbols. Allowed values range from 1 to 65535.
#define SYNC_WORD 0x12 // public default=0x12, LoRaWAN default=0x34
#define LDRO false // normally 'true' for SF-11 or 12
#define CRC true
#define IQINVERTED false
#define DATA_SHAPING RADIOLIB_SHAPING_1_0 // Data shaping = 1.0
#define TCXO_VOLTAGE 1.7 // volts
#define WHITENING_INITIAL 0x00FF // initial whitening LFSR value
... followed by the actual command:
int state = radio.begin(FREQUENCY,
BANDWIDTH,
SPREADING_FACTOR,
CODING_RATE,
SYNC_WORD,
OUTPUT_POWER,
LORA_PREAMBLE_LEN,
TCXO_VOLTAGE);
radio.setCurrentLimit(CURRENT_LIMIT);
radio.forceLDRO(LDRO);
radio.setCRC(CRC);
radio.invertIQ(IQINVERTED);
radio.setWhitening(true, WHITENING_INITIAL);
radio.explicitHeader();
... since this configuration works SO extremely well for me w/ the Pi-Pico & the LoRa hat mentioned above, I just wanted to share in case it helps!
... just realized that this issue is discussing the Pi-5, not the Pico. Perhaps I am mixing multiple issues that I've seen posted.
Regardless, I am still using an sx1262 device, perhaps this is some help. Or, if someone determines that this is helpful to another issue #, please feel free to move it.
Hello. I am the partner of the OP. I wanted to chime and and answer some of those questions you proposed.
How are you compiling the library and your main files? If you are installing the library on your machine, you will have to recompile it each time you change it. So if you did some changes to the library source, you will have to reinstall the library, otherwise you are still using the unchanged version.
Seeing as you have shown two .cpp files, I'm guessing you have two Raspberry Pi computers, one running rx, the other running tx, correct?
It's always possible some bug got introduced recently. Are you using the 6.6.0.0 update, or the latest master? And did you update the library since it worked last?
Yeah as my partner said, i bought a wave share LORAWAN SX1262 Pi Hat to see if maybe that would work for receiving Lora, and it does not. I believe we are using the latest master, and no I believe neither of us have pulled any further updates since our original pull from github.
The -2 in the log is from an assertion - during initialization, the module returns
0xFF
which gets evaluated as a faulty SPI. It is strange this appears after the SPI was working, as the library can read the SX126x version. It seems like this did not cause any further issue, and the SPI appears to be working afterwards, but it is strange nonetheless. Are there any other programs running on the RPi that could be using the SPI?
To update from my side of things. I am able to transmit and receive FSK. No issues really. I am able to change parameters, see the data rates change and all. I wanted to share a few pictures I captured.
This is the output i get on the RX side of things when using the FSK modem.
And this is the output I get when i comment out the begin.fsk and include the begin function for Lora. (on each pi)
We appreciate your time.
I believe we are using the latest master, and no I believe neither of us have pulled any further updates since our original pull from github.
I believe in a few things, but repository revisions are not one of them. git describe --always
will let us know for sure, run it on both machines in the cloned repository and post the output.
this is the output I get when i comment out the begin.fsk and include the begin function for Lora
I can see it prints out "Received:" - that is not part of the code that is posted above, so I'm very confused as to what exactly are you running, but I'm guessing that this means the interrupt does arrive. The debug output shows command 0x13
returns 0 0
- that means there are no data in the Rx buffer for LoRa. So I suspect a misconfiguration. I also need to repeat my question as to the fact you seem to be using a LoRaWAN-reserved sync word - why?
To make sure no bug was introduced recently, I ran this on my RPi 3B+ with the following result (transmitter is an ESP32 with SX1278):
pi@raspberrypi:~/repos/sketches/SX126x_Receive $ ./build/rlb
[SX1261] Initializing ... success!
[SX1261] Starting to listen ... success!
Data: Hello World! #69
Data: Hello World! #70
Data: Hello World! #71
Data: Hello World! #72
Data: Hello World! #73
Data: Hello World! #74
^C
Library version:
pi@raspberrypi:~/repos/RadioLib $ git describe --always
d3f9eaf3
```c++
#include
I wanted to share a few pictures I captured.
Capturing as text would allow someone to potentially parse / interpret them - as pictures not so much.
I believe in a few things, but repository revisions are not one of them.
git describe --always
will let us know for sure, run it on both machines in the cloned repository and post the output. (Transmitter Pi)
- sdr@PIZero2W:~/RadioLib $ git describe --always
- 07987434
(Receiver Pi)
I can see it prints out "Received:" - that is not part of the code that is posted above, so I'm very confused as to what exactly are you running, but I'm guessing that this means the interrupt does arrive. The debug output shows command
0x13
returns0 0
- that means there are no data in the Rx buffer for LoRa. So I suspect a misconfiguration. I also need to repeat my question as to the fact you seem to be using a LoRaWAN-reserved sync word - why?
```c++
#include
```c++
#include
``` RLB_SPI: CMDW RLB_SPI: SI 0 RLB_SPI: SO A2 [SX1262] Initializing ... RLB_DBG: RadioLib Info Version: "6.6.0.0" Platform: "Generic" Compiled: "Sep 1 2024" "08:47:55" RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDR 1D 3 20 RLB_SPI: SI 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 53 58 31 32 36 31 20 56 32 44 20 32 44 30 32 0 RLB_DBG: Found SX126x: RADIOLIB_SX126X_REG_VERSION_STRING: RLB_DBG: 00000320: 53 58 31 32 36 31 20 56 32 44 20 32 44 30 32 00 SX1261 V2D 2D02. RLB_DBG: RLB_DBG: M SX126x RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 8A RLB_SPI: SI 1 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 93 RLB_SPI: SI 20 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 88 RLB_SPI: SI 3 16 A 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 8 RLB_SPI: SI 0 0 0 0 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 89 RLB_SPI: SI 7F RLB_SPI: SO A2 A2 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW 8B RLB_SPI: SI 9 6 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW D 7 40 RLB_SPI: SI 4 A4 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 0 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 96 RLB_SPI: SI 1 RLB_SPI: SO A2 A2 RLB_SPI: CMDW D 8 E7 RLB_SPI: SI 18 RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 9D RLB_SPI: SI 1 RLB_SPI: SO A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 0 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 0 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW 8B RLB_SPI: SI 7 6 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW 8B RLB_SPI: SI 7 4 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDW 98 RLB_SPI: SI E1 E9 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 86 RLB_SPI: SI 39 30 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 1D 8 D8 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 C8 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 8 D8 RLB_SPI: SI DE RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDR 1D 8 E7 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 18 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW 95 RLB_SPI: SI 4 7 0 1 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDW 8E RLB_SPI: SI 8 4 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW D 8 E7 RLB_SPI: SI 18 RLB_SPI: SO A2 A2 A2 A2 success! [SX1262] Starting to listen ... RLB_SPI: CMDW 8 RLB_SPI: SI 2 62 0 2 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 0 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 82 RLB_SPI: SI FF FF FF RLB_SPI: SO A2 A2 ```
``` RLB_SPI: CMDW RLB_SPI: SI 0 RLB_SPI: SO A2 [SX1262] Initializing ... RLB_DBG: RadioLib Info Version: "6.6.0.0" Platform: "Generic" Compiled: "Sep 1 2024" "08:47:55" RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDR 1D 3 20 RLB_SPI: SI 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 53 58 31 32 36 31 20 56 32 44 20 32 44 30 32 0 RLB_DBG: Found SX126x: RADIOLIB_SX126X_REG_VERSION_STRING: RLB_DBG: 00000320: 53 58 31 32 36 31 20 56 32 44 20 32 44 30 32 00 SX1261 V2D 2D02. RLB_DBG: RLB_DBG: M SX126x RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 8A RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 93 RLB_SPI: SI 20 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 88 RLB_SPI: SI 3 D A 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 8 RLB_SPI: SI 0 0 0 0 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 89 RLB_SPI: SI 7F RLB_SPI: SO A2 A2 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 0 RLB_SPI: CMDW 8B RLB_SPI: SI 3 41 55 9 1A 0 CC CC RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 0 RLB_SPI: CMDW 8B RLB_SPI: SI 3 41 55 9 1A 2 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 0 RLB_SPI: CMDW 8B RLB_SPI: SI 3 41 55 9 9 2 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW D 8 E7 RLB_SPI: SI 18 RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 0 RLB_SPI: CMDW 8C RLB_SPI: SI 0 10 5 0 0 0 FF 6 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 96 RLB_SPI: SI 1 RLB_SPI: SO A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 0 RLB_SPI: CMDW D 6 C0 RLB_SPI: SI 12 AD RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 10 5 10 0 0 FF 6 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 0 RLB_SPI: CMDW 8B RLB_SPI: SI 3 41 55 0 9 2 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 0 RLB_SPI: CMDW 8C RLB_SPI: SI 0 10 5 10 0 0 FF 6 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 0 RLB_SPI: CMDW 8C RLB_SPI: SI 0 10 5 10 0 1 FF 6 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 0 RLB_SPI: CMDW 8C RLB_SPI: SI 0 10 5 10 0 1 FF 6 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW D 6 BC RLB_SPI: SI 1D F RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDW D 6 BE RLB_SPI: SI 10 21 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDW 9D RLB_SPI: SI 1 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 98 RLB_SPI: SI E1 E9 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 86 RLB_SPI: SI 39 30 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 1D 8 D8 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 C8 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 8 D8 RLB_SPI: SI DE RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDR 1D 8 E7 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 18 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW 95 RLB_SPI: SI 4 7 0 1 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDW 8E RLB_SPI: SI 14 4 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW D 8 E7 RLB_SPI: SI 18 RLB_SPI: SO A2 A2 A2 A2 success! [SX1262] Starting to listen ... RLB_SPI: CMDW 8 RLB_SPI: SI 2 62 0 2 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 0 RLB_SPI: CMDW 8C RLB_SPI: SI 0 10 5 10 0 1 FF 6 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 82 RLB_SPI: SI FF FF FF RLB_SPI: SO A2 A2 A2 A2 success! RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 0 RLB_SPI: CMDR 13 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 2A 0 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO D4 54 54 RLB_SPI: CMDR 12 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 0 2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 0 RLB_SPI: CMDR 13 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 2A 0 RLB_SPI: CMDR 1E 0 RLB_SPI: SI 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RLB_SPI: SO D4 D4 D4 54 69 6D 65 73 74 61 6D 70 3A 20 31 37 32 35 32 30 39 33 39 30 34 30 38 2C 20 48 65 6C 6C 6F 20 57 6F 72 6C 64 21 20 23 31 35 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 D4 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO D2 D2 D2 Data: Timestamp: 1725209390408, Hello World! #15 RLB_SPI: CMDW 8 RLB_SPI: SI 2 62 0 2 0 0 0 0 RLB_SPI: SO D2 D2 D2 D2 D2 D2 D2 D2 D2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO D2 D2 D2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO D2 D2 D2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D2 D2 0 RLB_SPI: CMDW 8C RLB_SPI: SI 0 10 5 10 0 1 FF 6 0 RLB_SPI: SO D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 RLB_SPI: CMDW 82 RLB_SPI: SI FF FF FF RLB_SPI: SO D2 D2 D2 D2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 0 RLB_SPI: CMDR 13 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 2A 2A RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO D4 54 54 RLB_SPI: CMDR 12 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 0 2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 0 RLB_SPI: CMDR 13 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 2A 2A RLB_SPI: CMDR 1E 0 RLB_SPI: SI 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RLB_SPI: SO D4 D4 D4 54 69 6D 65 73 74 61 6D 70 3A 20 31 37 32 35 32 30 39 33 39 31 34 39 39 2C 20 48 65 6C 6C 6F 20 57 6F 72 6C 64 21 20 23 31 36 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 D4 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO D2 D2 D2 Data: Timestamp: 1725209391499, Hello World! #16 RLB_SPI: CMDW 8 RLB_SPI: SI 2 62 0 2 0 0 0 0 RLB_SPI: SO D2 D2 D2 D2 D2 D2 D2 D2 D2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO D2 D2 D2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO D2 D2 D2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D2 D2 0 RLB_SPI: CMDW 8C RLB_SPI: SI 0 10 5 10 0 1 FF 6 0 RLB_SPI: SO D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 RLB_SPI: CMDW 82 RLB_SPI: SI FF FF FF RLB_SPI: SO D2 D2 D2 D2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 0 RLB_SPI: CMDR 13 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 2A 2A RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO D4 54 54 RLB_SPI: CMDR 12 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 0 2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 0 RLB_SPI: CMDR 13 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 2A 2A RLB_SPI: CMDR 1E 0 RLB_SPI: SI 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RLB_SPI: SO D4 D4 D4 54 69 6D 65 73 74 61 6D 70 3A 20 31 37 32 35 32 30 39 33 39 32 35 38 38 2C 20 48 65 6C 6C 6F 20 57 6F 72 6C 64 21 20 23 31 37 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 D4 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO D2 D2 D2 Data: Timestamp: 1725209392588, Hello World! #17 RLB_SPI: CMDW 8 RLB_SPI: SI 2 62 0 2 0 0 0 0 RLB_SPI: SO D2 D2 D2 D2 D2 D2 D2 D2 D2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO D2 D2 D2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO D2 D2 D2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D2 D2 0 RLB_SPI: CMDW 8C RLB_SPI: SI 0 10 5 10 0 1 FF 6 0 RLB_SPI: SO D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 RLB_SPI: CMDW 82 RLB_SPI: SI FF FF FF RLB_SPI: SO D2 D2 D2 D2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 0 RLB_SPI: CMDR 13 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 2A 2A RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO D4 54 54 RLB_SPI: CMDR 12 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 0 2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 0 RLB_SPI: CMDR 13 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 2A 2A RLB_SPI: CMDR 1E 0 RLB_SPI: SI 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RLB_SPI: SO D4 D4 D4 54 69 6D 65 73 74 61 6D 70 3A 20 31 37 32 35 32 30 39 33 39 33 36 37 37 2C 20 48 65 6C 6C 6F 20 57 6F 72 6C 64 21 20 23 31 38 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 D4 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO D2 D2 D2 Data: Timestamp: 1725209393677, Hello World! #18 RLB_SPI: CMDW 8 RLB_SPI: SI 2 62 0 2 0 0 0 0 RLB_SPI: SO D2 D2 D2 D2 D2 D2 D2 D2 D2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO D2 D2 D2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO D2 D2 D2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D2 D2 0 RLB_SPI: CMDW 8C RLB_SPI: SI 0 10 5 10 0 1 FF 6 0 RLB_SPI: SO D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 RLB_SPI: CMDW 82 RLB_SPI: SI FF FF FF RLB_SPI: SO D2 D2 D2 D2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 0 RLB_SPI: CMDR 13 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 2A 2A RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO D4 54 54 RLB_SPI: CMDR 12 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 0 2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 0 RLB_SPI: CMDR 13 RLB_SPI: SI 0 0 0 RLB_SPI: SO D4 D4 2A 2A RLB_SPI: CMDR 1E 0 RLB_SPI: SI 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RLB_SPI: SO D4 D4 D4 54 69 6D 65 73 74 61 6D 70 3A 20 31 37 32 35 32 30 39 33 39 34 37 36 36 2C 20 48 65 6C 6C 6F 20 57 6F 72 6C 64 21 20 23 31 39 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO D4 D4 D4 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO D2 D2 D2 Data: Timestamp: 1725209394766, Hello World! #19 ```
(Receiver Pi)
sdr@PI4:~/SX12XX_Project/src/RadioLib $ git describe --always b9dd294
Try as I may, I cannot find that revision in this repository - are you sure you're not on some fork/branch? Either way, you have two different revisions, that doesn't seem intentional.
You also seem to be missing a sync word in your begin
call, so you are transmitting packets with no preamble.
I would propose the following:
git pull
in the repository to get the latest master. Check the version afterwards.radio.XTAL = false;
prior to calling radio.begin
. Only make incremental changes to the default values and after each one, make sure that the link still works.Also, minor point - in your receive code, you don't have to call startReceive
again in the loop.
PS: I took the liberty of editing your post to hide the long code listigns and debug logs with a "Details" section. A lot easier to read now, no?
Okay, I have many updates. I wanted to address your suggestions first. I am running the exact same code as the receiver you sent, except obviously modified the pins for how my hardware is set up. (Just use radio.XTAL = true;, then radio.begin(), not changing any other parameters yet, only call startReceive
outside of loop). These changes were of course reflected in the transmitter code as well, so the sync word is now 0x12, not 0x34. I'll attach them as details below.
- ... I would suggest just doing a
git pull
in the repository to get the latest master. Check the version afterwards.
I did this with the libraries on both Pi's and then from there did git describe --always
. The following is the output from both, confirming they match:
lmk@QuADbackup:~/SX12XX_Project/RadioLib $ git pull
Already up to date.
lmk@QuADbackup:~/SX12XX_Project/RadioLib $ git describe --always
eda4ec22
Note: this is the secondary pi, hence the slightly different filepath. Same exact project, code, and cmake file accounts for this.
The transmitter is working, for sure. I am able to receive on my SDR running the same LoRa parameters, even despite the "-2" I get in SX126X.cpp at line 277 again. However when I run the receiver it gives me this:
lmk@QuADbackup:~/SX12XX_Project/lora_src $ ./simple_rx
[SX1261] Initializing ... RLB_DBG:
RadioLib Info
Version: "6.6.0.0"
Platform: "Generic"
Compiled: "Sep 1 2024" "14:28:36"
RLB_SPI: CMDW 80
RLB_SPI: SI 0
RLB_SPI: SO FF FF
RLB_DBG: -2 at /home/lmk/SX12XX_Project/RadioLib/src/Module.cpp:277
RLB_SPI: CMDW 80
RLB_SPI: SI 0
RLB_SPI: SO A2 A2
RLB_SPI: CMDR 1D 3 20
RLB_SPI: SI 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0
RLB_SPI: SO A2 A2 A2 A2 53 58 31 32 36 31 20 56 32 44 20 32 44 30 32 0
RLB_DBG: Found SX126x: RADIOLIB_SX126X_REG_VERSION_STRING:
RLB_DBG: 00000320: 53 58 31 32 36 31 20 56 32 44 20 32 44 30 32 00 SX1261 V2D 2D02.
RLB_DBG:
RLB_DBG: M SX126x
RLB_SPI: CMDW 80
RLB_SPI: SI 0
RLB_SPI: SO FF FF
RLB_DBG: -2 at /home/lmk/SX12XX_Project/RadioLib/src/Module.cpp:277
RLB_SPI: CMDW 80
RLB_SPI: SI 0
RLB_SPI: SO A2 A2
RLB_SPI: CMDW 80
RLB_SPI: SI 0
RLB_SPI: SO A2 A2
RLB_SPI: CMDW 8F
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 A2
RLB_SPI: CMDW 8A
RLB_SPI: SI 1
RLB_SPI: SO A2 A2
RLB_SPI: CMDW 93
RLB_SPI: SI 20
RLB_SPI: SO A2 A2
RLB_SPI: CMDW 88
RLB_SPI: SI 3 16 A 0 0 0 0
RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2
RLB_SPI: CMDW 2
RLB_SPI: SI 43 FF
RLB_SPI: SO A2 A2 A2
RLB_SPI: CMDW 8
RLB_SPI: SI 0 0 0 0 0 0 0 0
RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2
RLB_SPI: CMDW 89
RLB_SPI: SI 7F
RLB_SPI: SO A2 A2
RLB_SPI: CMDR C0
RLB_SPI: SI 0 0
RLB_SPI: SO A2 22 22
RLB_SPI: CMDR 11
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 1
RLB_SPI: CMDW 8B
RLB_SPI: SI 9 6 3 0
RLB_SPI: SO A2 A2 A2 A2 A2
RLB_SPI: CMDR 11
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 1
RLB_SPI: CMDW D 7 40
RLB_SPI: SI 14 24
RLB_SPI: SO A2 A2 A2 A2 A2
RLB_SPI: CMDR 11
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 1
RLB_SPI: CMDR 1D 7 36
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 A2 A2 D
RLB_SPI: CMDR C0
RLB_SPI: SI 0 0
RLB_SPI: SO A2 22 22
RLB_SPI: CMDW D 7 36
RLB_SPI: SI D
RLB_SPI: SO A2 A2 A2 A2
RLB_SPI: CMDW 8C
RLB_SPI: SI 0 8 0 FF 1 0
RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2
RLB_SPI: CMDW 96
RLB_SPI: SI 1
RLB_SPI: SO A2 A2
RLB_SPI: CMDW D 8 E7
RLB_SPI: SI 18
RLB_SPI: SO A2 A2 A2 A2
RLB_SPI: CMDW 9D
RLB_SPI: SI 1
RLB_SPI: SO A2 A2
RLB_SPI: CMDR 11
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 1
RLB_SPI: CMDR 1D 7 36
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 A2 A2 D
RLB_SPI: CMDR C0
RLB_SPI: SI 0 0
RLB_SPI: SO A2 22 22
RLB_SPI: CMDW D 7 36
RLB_SPI: SI D
RLB_SPI: SO A2 A2 A2 A2
RLB_SPI: CMDW 8C
RLB_SPI: SI 0 8 0 FF 1 0
RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2
RLB_SPI: CMDR 11
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 1
RLB_SPI: CMDR 1D 7 36
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 A2 A2 D
RLB_SPI: CMDR C0
RLB_SPI: SI 0 0
RLB_SPI: SO A2 22 22
RLB_SPI: CMDW D 7 36
RLB_SPI: SI D
RLB_SPI: SO A2 A2 A2 A2
RLB_SPI: CMDW 8C
RLB_SPI: SI 0 8 0 FF 1 0
RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2
RLB_SPI: CMDR 11
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 1
RLB_SPI: CMDW 8B
RLB_SPI: SI 9 6 3 0
RLB_SPI: SO A2 A2 A2 A2 A2
RLB_SPI: CMDR 11
RLB_SPI: SI 0 0
RLB_SPI: SO A2 A2 1
RLB_SPI: CMDW 8B
RLB_SPI: SI 9 4 3 0
RLB_SPI: SO A2 A2 A2 A2 A2
RLB_SPI: CMDW 98
RLB_SPI: SI 6B 6F
RLB_SPI: SO A2 A2 A2
RLB_SPI: CMDW 86
RLB_SPI: SI 1B 20 0 0
RLB_SPI: SO A2 A2 A2 A2 A2
RLB_SPI: CMDR 1D 8 D8
RLB_SPI: SI 0 0
RLB_SPI: SO C2 C2 C2 C2 C8
RLB_SPI: CMDR C0
RLB_SPI: SI 0 0
RLB_SPI: SO C2 42 42
RLB_SPI: CMDW D 8 D8
RLB_SPI: SI DE
RLB_SPI: SO C2 C2 C2 C2
RLB_SPI: CMDR 1D 8 E7
RLB_SPI: SI 0 0
RLB_SPI: SO C2 C2 C2 C2 18
RLB_SPI: CMDR C0
RLB_SPI: SI 0 0
RLB_SPI: SO C2 42 42
RLB_SPI: CMDW 95
RLB_SPI: SI 4 7 0 1
RLB_SPI: SO C2 C2 C2 C2 C2
RLB_SPI: CMDW 8E
RLB_SPI: SI A 4
RLB_SPI: SO C2 C2 C2
RLB_SPI: CMDW D 8 E7
RLB_SPI: SI 18
RLB_SPI: SO C2 C2 C2 C2
success!
[SX1261] Starting to listen ... RLB_SPI: CMDW 8
RLB_SPI: SI 2 72 0 2 0 0 0 0
RLB_SPI: SO AA AA AA AA AA AA AA AA AA
RLB_DBG: -707 at /home/lmk/SX12XX_Project/RadioLib/src/Module.cpp:277
RLB_DBG: -707 at /home/lmk/SX12XX_Project/RadioLib/src/modules/SX126x/SX126x.cpp:693
RLB_DBG: -707 at /home/lmk/SX12XX_Project/RadioLib/src/modules/SX126x/SX126x.cpp:611
failed, code -707
I've looked at the lines of SX126X.cpp that this error is received in and the two new lines (611, 693) deal with the IRQ pin. I have tried changing hardware pins for DIO1/IRQ as well as wires between the module and Pi to fix this, but still no change.
I'm providing my most up-to-date receiver and transmitter here:
The debug output shows something interesting:
RLB_SPI: CMDW 86
RLB_SPI: SI 1B 20 0 0
RLB_SPI: SO A2 A2 A2 A2 A2
RLB_SPI: CMDR 1D 8 D8
RLB_SPI: SI 0 0
RLB_SPI: SO C2 C2 C2 C2 C8
After the command 0x86
RADIOLIB_SX126X_CMD_SET_RF_FREQUENCY
is sent, the status turns from 0xA2
to 0xC2
. That means the device switched from standby to frequency synthesis, and then it just stays there. However, FS should be a transient mode, usually it's entered only prior to transmission or reception. I'm not sure why this only becomes an issue after the call to set IRQ, but it's definitely not something that should be happening.
Can you share you HAL?
Below is output from my RPi - you can see that it does not enter FS mode after setting the frequency. The hardware I'm using is a Waveshare LoRaWAN HAT. Same code as I posted above, just enabled debug.
``` [SX1261] Initializing ... RLB_DBG: RadioLib Info Version: "6.6.0.0" Platform: "Generic" Compiled: "Sep 2 2024" "17:10:23" RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDR 1D 3 20 RLB_SPI: SI 0 0 0 0 0 0 0 0 0 0 0 0 00 0 0 0 RLB_SPI: SO A2 A2 A2 A2 53 58 31 32 36 31 20 56 32 44 20 32 44 30 32 0 RLB_DBG: Found SX126x: RADIOLIB_SX126X_REG_VERSION_STRING: RLB_DBG: 00000320: 53 58 31 32 36 31 20 56 32 44 20 32 44 30 32 00 SX1261 V2D 2D02. RLB_DBG: RLB_DBG: M SX126x RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 80 RLB_SPI: SI 0 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 8A RLB_SPI: SI 1 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 93 RLB_SPI: SI 20 RLB_SPI: SO A2 A2 RLB_SPI: CMDW 88 RLB_SPI: SI 3 16 A 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 8 RLB_SPI: SI 0 0 0 0 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 89 RLB_SPI: SI 7F RLB_SPI: SO A2 A2 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW 8B RLB_SPI: SI 9 6 3 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW D 7 40 RLB_SPI: SI 14 24 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 8 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 96 RLB_SPI: SI 1 RLB_SPI: SO A2 A2 RLB_SPI: CMDW D 8 E7 RLB_SPI: SI 18 RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 9D RLB_SPI: SI 1 RLB_SPI: SO A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 8 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 8 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW 8B RLB_SPI: SI 9 6 3 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDW 8B RLB_SPI: SI 9 4 3 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDW 98 RLB_SPI: SI 6B 6F RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 86 RLB_SPI: SI 1B 20 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDR 1D 8 D8 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 C8 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 8 D8 RLB_SPI: SI DE RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDR 1D 8 E7 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 18 RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW 95 RLB_SPI: SI 4 7 0 1 RLB_SPI: SO A2 A2 A2 A2 A2 RLB_SPI: CMDW 8E RLB_SPI: SI A 4 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW D 8 E7 RLB_SPI: SI 18 RLB_SPI: SO A2 A2 A2 A2 success! [SX1261] Starting to listen ... RLB_SPI: CMDW 8 RLB_SPI: SI 2 72 0 2 0 0 0 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 8F RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDW 2 RLB_SPI: SI 43 FF RLB_SPI: SO A2 A2 A2 RLB_SPI: CMDR 11 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 1 RLB_SPI: CMDR 1D 7 36 RLB_SPI: SI 0 0 RLB_SPI: SO A2 A2 A2 A2 D RLB_SPI: CMDR C0 RLB_SPI: SI 0 0 RLB_SPI: SO A2 22 22 RLB_SPI: CMDW D 7 36 RLB_SPI: SI D RLB_SPI: SO A2 A2 A2 A2 RLB_SPI: CMDW 8C RLB_SPI: SI 0 8 0 FF 1 0 RLB_SPI: SO A2 A2 A2 A2 A2 A2 A2 RLB_SPI: CMDW 82 RLB_SPI: SI FF FF FF RLB_SPI: SO A2 A2 A2 A2 success! ```
Here are both the lgpio (unedited from source I believe) HAL and wiringPi HAL. The wiringPi HAL has worked consistently, but using different pins than my partner's setup I am able to use both and reproduce the same error I pasted in my last reply.
Thanks for sharing the HAL, aside from some strange stuff (why are copying the buffers in spiTransfer
... ? and are you sure the interrupt is working?), nothing seems immediately obvious.
I'm still puzzled as to the device being stuck in FS mode. You could try different frequencies to see if that behavior persists, or force calibration by calling SX1262::setFrequency(freq, true);
. Another thing to check is the power supply, I suspect there may be some high-frequency noise from the RPi that causes this (e.g. by intefering with its oscillators/PLL). Decoupling capacitors go some way to remove that. As a last resort, I would try an older RPi.
Unfortunately since the behavior seems rather random (behaving differently on different devices), it seems to be pointing to an issue with the hardware setup, specifically the RPi 5. So until we have more information taht points to some bug in the library code, I will convert this thread to a discussion.
Hardware:
Other notes:
This is not a new issue, but it's also really weird that we were receiving, albeit poorly, with LoRa using these settings, pinout, and drivers. It also was working better in FSK mode, but now receiving is broken for that as well. The interrupt seems to never fire, but it did at one point so I'm fairly confident I'm not setting up the interrupt function incorrectly. I really wish I could provide more information or context as to why it stopped working, but I have basically none and can't even get back to it "working sometimes" to troubleshoot. On the other hand, the Transmitter counterpart to this code is having no problems starting or transmitting! It's only receive.
I'll leave the code here in case it's helpful. When we run this, even with different settings or using beginFSK() instead, it still never fires. This could likely be an issue with using the RaspberryPi, our PiHal.h seems to be working fine but I can include that as well. I enabled the debug messages as well, and I don't 100% know what I'm looking at but the SPI transactions seem to be fine, but again I can provide that if it is at all helpful. I'm also a student learning this for a class essentially, so forgive me if I make silly mistakes in my code or understanding.
main.cpp