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jha-lab / acceltran

[TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers
BSD 3-Clause "New" or "Revised" License
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question about pe.sv #3

Closed TT-RAY closed 1 year ago

TT-RAY commented 1 year ago

Hello, I would like to ask a question in the hardware code. The implementation in synthesis/top/PE.sv seems to be a convolution operation, not the matrix multiplication operation mentioned in your article.

shikhartuli commented 1 year ago

The code in synthesis/top/was used from the repo JHA-Lab/codebench. However, most modules were not used for AccelTran. To avoid confusion, I have removed all old modules.