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jhshi / openofdm

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.
http://openofdm.rtfd.io
Apache License 2.0
354 stars 183 forks source link

Simulation enviorment set up #22

Open gyn opened 2 years ago

gyn commented 2 years ago

Anyone succeeds simulating this project using iverilog?