Closed GoogleCodeExporter closed 9 years ago
Yes, I don't have many ARM targets to test the code on unfortunately, it will
only work on ARM (not thumb) and I think it has to be v4 or above, I'll add
your change to the code anyway to reduce this problem.
Original comment by Flatmush@googlemail.com
on 13 Mar 2011 at 11:06
Too bad - but I gladly test any changed thumb asm code.
Just some uniformed guesses (I have to admit that I never did assembler with
the gcc and ARM..):
- Isn't the operand code off by one? I think the operands start with %0 and not
%1 - so there is no operand %3 which probably triggers this error message.
- In thumb mode, there is no OR instruction.
Original comment by blaic...@gmail.com
on 13 Mar 2011 at 11:41
I am currently porting the fp div from a previous support ticket to the thumb
instruction set. Currently it runs in about ~75% of the time compared to gcc
using 64bit integers, just the raw routine, no early outs or input formatting.
I can take a look at multiplication for thumb.
Original comment by joe.scha...@gmail.com
on 13 Mar 2011 at 2:55
Ok, I made the changes (register numbering oops) so it should work now, will
probably test it on the only arm target I have setup (XScale) tomorrow.
Original comment by Flatmush@googlemail.com
on 13 Mar 2011 at 6:45
Flatmush, you missed the braces in the preprocessor #if: When compiling for an
ARM thumb target both __arm__ and __thumb__ are defined.
With the fixed operand numbers I now get the error message:
Error: bad instruction `or r3,r3,r0,LSL#16'
Original comment by blaic...@gmail.com
on 14 Mar 2011 at 5:16
I fixed the preprocessor stuff and that error, I had forgotten that the correct
mnemonic for bitwise or on ARM is 'orr' to make it 3 letters long like every
other mnemonic.
All the assemblers I've ever written have been much more accepting of obvious
stuff like that.
Original comment by Flatmush@googlemail.com
on 14 Mar 2011 at 9:04
Great! Now the assembler code also compiles on my Cortex-M3. I will check out
tomorrow if the calculations are also correct. If so, you might drop the thumb
guard again.
Original comment by blaic...@gmail.com
on 14 Mar 2011 at 9:09
Your fix16_mul assembler code also works on the Cortex M3 in thumb mode. Great!
Original comment by blaic...@gmail.com
on 15 Mar 2011 at 8:28
Marked as fixed
Original comment by joe.scha...@gmail.com
on 15 Mar 2011 at 2:52
I hate to disturb again, but the issues is not properly fixed for thumb targets
as there is still the !defined(__thumb__) in the code. This can be dropped.
Original comment by blaic...@gmail.com
on 15 Mar 2011 at 3:42
Thumb only targets do not have the SMULL instruction.
It should probably be changed to defined(__thumb2__).
I think cortex m3 defines __thumb__ and __thumb2__
M0 defines __thumb__.
I'll make the change
Original comment by joe.scha...@gmail.com
on 15 Mar 2011 at 3:46
Original issue reported on code.google.com by
blaic...@gmail.com
on 13 Mar 2011 at 10:19