Design Principles of MIPS ISA

[jimin-kiim]

• Introduction to MIPS
• Design Principles of MIPS
• Register and Memory
• Stored program concept
• Data representation
• Instruction representation

[jimin-kiim]

Introduction to MIPS

ISA(Instruction Set Architecture)

• important abstraction
• language of the computer
• an interface between low level SW(system software; running right above the HW, running on the OS) and HW
• tells us what instructions are supported in the HW
• defines
  • the type of instructions(arithmetic, conditional, data transfer, branch)
  • the way to use data in instructions
  • the format of data
  • the format of instructions
• different implementations of the same architecture. even though the hardware differs, ISA can run on them.
• sometimes it prevents using new innovations. If I want to change ISA, new compilers are needed

MIPS(Microprocessor without Interlocked Pipelined Stages) ISA

• in the 90s, MIPS based processors were the best selling processors
• tons of embedded systems are still using MIPS
• most modern ISAs(x86, armv7, armv8) also have a similar architecture with MIPS
• having knowledge of MIPS makes it easier to understand other ISAs

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Design Principle of MIPS

Design Principle 1: Simplicity favors regularity

• all MIPS arithmetic instructions(add, sub) include a single operation and three operands
• regular -> implementation simpler -> higher performance at lower cost

MIPS assembly language

f = (g+h) - (i+j)

add t0, g, h add t1, i, j sub f, t0, t1

Design Principle 2: Smaller is faster

• operands of MIPS arithmetic instructions must be chosen in a small number of registers
• in MIPS, there are 32 32-bit registers
  • in MIPS64, there are 64-bit registers
  • large number of registers may increase the clock period since it takes longer to travel farther

MIPS assembly language

f = (g+h) - (i+j) f, g, h, i , j are assigned to the registers $s0, $s1, $s2, $s3, $s4

add $t0, $s1, $s2 add $t1, $s3, $s4 sub $s0, $t0, $t1

Design Principle 3: Make the common case fast

• common case : programs use a small constant in an operation many times
  • incrementing an index to point to the next element of and array(in the main memory) every time is tedious
  • to make it faster
  • MIPS supports 16-bit immediate operands for handling the constants
  • MIPS supports register 0 ($zero) contains the constant 0

MIPS assembly language

incrementing : addi $t0, $t0, 4 moving : add $t0, $t1, $zero

Design Principle 4: Good design demands good compromise

• compromise : keeping all instructions the same length, uniformly
  • MIPS keeps formats as similar as possible (regularity)

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Register and Memory

Register

• fast locations for data

• faster to access than memory

• # of registers is determined by ISA

• compilers must use registers for variables as much as possible

  • not all variables can be stored in register since the # of registers is limited.

• variables for operations are stored in register

• each of 32 registers (in MIPS) has its conventional name and usage

  Memory

• large, single dimensional array that can contain billions of data elements

• complex data(arrays, structures, dynamic data) and instructions are stored in memory

• operating on memory data requires additional data transferring instructions (loads, stores)

• practically most of the data must be in the main memory first and when we have to do some operations, then fetch the data from the memory to the registers. After the operation, put the result back to the memory.

Memory Address

• an index to the memory array, starting at 0
• we need to know the address when loading or storing the data
• when the computer is n bit computer then it means that it has n bit memory address -> 2^n bytes is the maximum size of the memory.

  Byte Addressing

• MIPS uses byte addressing( Each address identifies an 8-bit byte)
  • but most data items are larger than a byte, so they use words
  • in MIPS, a word is 32-bits and words must start at address that are multiples of 4 (alignment restriction)
  • some data items use one or two bytes(half word)

Byte Ordering

• Big Endian : placing the most significant byte first and the least significant byte last
• Little Endian : placing the least significant byte first and the most significant byte last
• MIPS is big endian

Memory instructions

MIPS assembly language

lw $t0, 32($s3) add $s1, $s2, $t0

• data transferring instructions are needed
  • loading word : lw reg1 offset(reg2)
  • storing word : sw reg1 offset(reg2)
  • loading halfword : lh reg1 offset(reg2)
  • storing halfword : sh reg1 offset(reg2)
  • loading 8-bit data : lb reg1 offset(reg2)
  • storing 8-bit data : sb reg1 offset(reg2)
• above expressions are in assembly language. Later, assembler translates them into binary machine language(endcoded)

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running a program

• "executing instructions in the program which is in the memory"
• since program is in the memory, memory has the instructions
• "moving inside the memory"

Stored program concept

• data and instructions are stored in memory, represented in binary
• data and instructions needed to be encoded in well-formed binary

Data representation

numbers

• numbers are kept as binary numbers
  • series of 1 and 0
  • base 2 numbers
  • the i-th digit d in binary numbers means d x 2^i (i starts from 0)
• binary numbers are stored in words
  • in MIPS the words are 32bits(4 bytes) long & big endian

unsigned numbers

• by using n bits, we can represent unsigned numbers from 0 to 2^n-1

signed numbers

• sign bit + magnitude
  • both 000 and 100 represent 0
• one's complement
  • both 000 and 100 represent 0
  • positive numbers are the same as usual but in the case of negative numbers, 0 and 1 are flipped
• two's complement
  • positive numbers are the same as usual but in the case of negative numbers, 0 and 1 are flipped and 1 is added
  • can represent from -2^(n-1) to 2^(n-1)-1. 2^(n-1) cannot be represented
  • the left most bit came to be a sign bit. positive numbers start with 0 and 1 for negative numbers

[jimin-kiim]

Instruction Representation

• like data, instructions are also translated from assembly language into binary (encoded)
• machine instructions : encoded instructions
• for a simpler computer architecture, instruction formats should have regularity.
• instruction follows R-format or I-format that are similar to each other

  R - format

  op	rs	rt	rd	shamt	funct
  6 bits	5 bits	5 bits	5 bits	5 bits	6 bits

• Arithmetic, Logic
• op(opcode) : what the operation does (add, sub, nor, and...)
• rs : the first source register operand
• rt : the second source register operand
• rd : the destination register operand
• shamt : used for shift operation. shift amount
• funct : function code (the specific variant of the operation)

  I - format

  op	rs	rt	constant or address
  6 bits	5 bits	5 bits	16 bits

• Load, Store, Branch, Immediate
• op(opcode) : what the operation does (addi, subi, nori, andi...)
• rs : the first source register operand
• rt : the second source register operand
• constant or address

J - format

op	address
6 bits	26 bits

• Jump
• op(opcode) : what the operation does
• address