Open spth opened 8 years ago
That would be great to have support for SDCC. After finishing the IAR port, I started looking at porting the STM8 for Cosmic compiler, but having a port for SDCC next would probably be even more interesting. Were you willing to participate?
I guess I can help. I ported Atomthreads to SDCC before (https://github.com/spth/atomthreads). But nOS doesn't seem to have much documentation. Also, I Atomthreads has some self-tests that can be used to see if the port works. Could nOS get such tests, too?
Philipp
Some differences between SDCC and IAR that might affect the port: In C90 and C99 modes, SDCC is not yet as standard-compliant as SDCC. But it is a bit closer to compliance than Cosmic. SDCC currently has only one memory model that uses a 64K address space. Unlike the other compilers for the STM8, SDCC currently does not use any virtual registers (thus SDCC has lower interrupt latency). A more verbose comparison of the STM8 C compilers can be found at: http://colecovision.eu/stm8/compilers.shtml
Philipp
Automated tests for ports are definitely a must, but there is nothing done yet unfortunately. For now, the ports are tested manually with the debugger and with the corresponding example project in https://github.com/jimtremblay/nOS-examples.
The documentation is also lacking, but I would be glad to answer your questions if you have any. We have a gitter chat room, accessible from the repo Readme file or you can email me directly, at your convenience.
Is there specific documentation about the SDCC STM8 port (calling convention, models..) or all existing documentation is in the SDCC user guide?
Thanks for the link about the compilers, it's quite interesting.
There currently is not specific information on the STM8 port. The SDCC user guide is all there is. SDCC does not support a lot of STM8-specific stuff yet. And the STM8 is relatively easy to target, so one doesn't need to do a lot of target-specific stuff.
As documented in the user guide, interrupts are declared with __interrupt(N) where N is an integer constant for the interrupt number. Currently, all arguments are passed on the stack, right-to-left. Return values are in: 8-bit: Register A 16-bit: Register X 32-Bit: Registers X and Y Other sizes: Via hidden pointer argument The STM8 target does not yet support different memory models. Everything is just one 64K address space.
Philipp
Could you document for the IAR_STM8-Discovery project what the supposed observable behaviour is?
Philipp
Hi Philipp,
I don't know on what timezone you are on, but maybe we could arrange a chat session. That would be more convenient.
Unfortunately, a chat session would be hard for me to arrange, at least for the next 10 days or so (I'll be minding my 1 and 2 year old sons mostly on my own during that time; while the older has a regular sleep pattern it might be harder with the younger one).
Besides the GitHub issue tracker, we could use email, or the SDCC trackers at SourceForge (for any issues in SDCC that might come up, such as lack of documentation), and the sdcc-users mailing list.
Philipp
Sounds good.
As for the IAR_STM8-Discovery project, it makes a LED blink every second. ThreadA turns it ON and ThreadB turns it OFF. A semaphore takes charge of the synchronization.
AFAIK nOS currently needs IAR to build for STM8. How about adding support for free SDCC?
Philipp