jjhorton / PMod

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Firmware build for PMod Neopixel board #46

Closed jjhorton closed 2 years ago

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   350/ 5280     6%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 74.84 MHz (PASS at 12.00 MHz)
jjhorton commented 2 years ago

Currently the build acheives the following:

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   350/ 5280     6%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 74.84 MHz (PASS at 12.00 MHz)
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   365/ 5280     6%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 54.49 MHz (PASS at 12.00 MHz)
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   383/ 5280     7%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 67.49 MHz (PASS at 12.00 MHz)
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   380/ 5280     7%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 54.80 MHz (PASS at 12.00 MHz)
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   383/ 5280     7%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 67.01 MHz (PASS at 12.00 MHz)

\n Coverage Stats:


logs/coverage.txt
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   383/ 5280     7%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 67.01 MHz (PASS at 12.00 MHz)

\n Coverage Stats:

Reading tracefile logs/coverage.info
                  |Lines       |Functions  |Branches    
Filename          |Rate     Num|Rate    Num|Rate     Num
========================================================
[/]
rxuart.v          |84.5%     58|    -     0|    -      0
top.v             |69.7%     76|    -     0|    -      0
writepixel.v      |30.0%     60|    -     0|    -      0
========================================================
            Total:|61.9%    194|    -     0|    -      0
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   383/ 5280     7%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 67.01 MHz (PASS at 12.00 MHz)

Coverage Stats:

Reading tracefile logs/coverage.info
                  |Lines       |Functions  |Branches    
Filename          |Rate     Num|Rate    Num|Rate     Num
========================================================
[/]
rxuart.v          |84.5%     58|    -     0|    -      0
top.v             |69.7%     76|    -     0|    -      0
writepixel.v      |30.0%     60|    -     0|    -      0
========================================================
            Total:|61.9%    194|    -     0|    -      0
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   348/ 5280     6%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 64.05 MHz (PASS at 12.00 MHz)

Coverage Stats:

Reading tracefile logs/coverage.info
                  |Lines       |Functions  |Branches    
Filename          |Rate     Num|Rate    Num|Rate     Num
========================================================
[/]
rxuart.v          |93.1%     58|    -     0|    -      0
top.v             |63.2%     76|    -     0|    -      0
writepixel.v      |30.0%     60|    -     0|    -      0
========================================================
            Total:|61.9%    194|    -     0|    -      0
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   783/ 5280    14%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 67.61 MHz (PASS at 12.00 MHz)

Coverage Stats:

Reading tracefile logs/coverage.info
                  |Lines       |Functions  |Branches    
Filename          |Rate     Num|Rate    Num|Rate     Num
========================================================
[/]
rxuart.v          |93.1%     58|    -     0|    -      0
top.v             |71.6%     81|    -     0|    -      0
writepixel.v      |30.0%     60|    -     0|    -      0
========================================================
            Total:|65.3%    199|    -     0|    -      0
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   781/ 5280    14%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 60.32 MHz (PASS at 12.00 MHz)

Coverage Stats:

Reading tracefile logs/coverage.info
                  |Lines       |Functions  |Branches    
Filename          |Rate     Num|Rate    Num|Rate     Num
========================================================
[/]
rxuart.v          |96.6%     58|    -     0|    -      0
top.v             |71.6%     81|    -     0|    -      0
writepixel.v      |30.0%     60|    -     0|    -      0
========================================================
            Total:|66.3%    199|    -     0|    -      0
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   781/ 5280    14%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 58.41 MHz (PASS at 12.00 MHz)

Coverage Stats:

Reading tracefile logs/coverage.info
                  |Lines       |Functions  |Branches    
Filename          |Rate     Num|Rate    Num|Rate     Num
========================================================
[/]
rxuart.v          |96.6%     58|    -     0|    -      0
top.v             |96.3%     81|    -     0|    -      0
writepixel.v      | 100%     60|    -     0|    -      0
========================================================
            Total:|97.5%    199|    -     0|    -      0
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   776/ 5280    14%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 52.27 MHz (PASS at 12.00 MHz)

Coverage Stats:

Reading tracefile logs/coverage.info
                  |Lines       |Functions  |Branches    
Filename          |Rate     Num|Rate    Num|Rate     Num
========================================================
[/]
rxuart.v          |96.6%     58|    -     0|    -      0
top.v             |96.3%     81|    -     0|    -      0
writepixel.v      | 100%     60|    -     0|    -      0
========================================================
            Total:|97.5%    199|    -     0|    -      0
github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:   776/ 5280    14%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:    18/   96    18%
                   SB_GB:     8/    8   100%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'writepixel.pixel_clk_$glb_clk': 52.27 MHz (PASS at 12.00 MHz)

Coverage Stats:

Reading tracefile logs/coverage.info
                  |Lines       |Functions  |Branches    
Filename          |Rate     Num|Rate    Num|Rate     Num
========================================================
[/]
rxuart.v          |96.6%     58|    -     0|    -      0
top.v             |96.3%     81|    -     0|    -      0
writepixel.v      | 100%     60|    -     0|    -      0
========================================================
            Total:|97.5%    199|    -     0|    -      0