LED Firmware Testing - Githubissues

jjhorton commented 2 years ago

Add LED Firmware testing using verilator and reporting on FPGA stats in pull requests

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:    40/ 5280     0%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:     9/   96     9%
                   SB_GB:     2/    8    25%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'CLK$SB_IO_IN_$glb_clk': 74.76 MHz (PASS at 12.00 MHz)

Coverage Stats:

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:    40/ 5280     0%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:     9/   96     9%
                   SB_GB:     2/    8    25%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'CLK$SB_IO_IN_$glb_clk': 74.76 MHz (PASS at 12.00 MHz)

Coverage Stats:

Reading tracefile logs/coverage.info
            |Lines       |Functions  |Branches    
Filename    |Rate     Num|Rate    Num|Rate     Num
==================================================
[/]
blinky.v    | 100%     15|    -     0|    -      0
==================================================
      Total:| 100%     15|    -     0|    -      0

github-actions[bot] commented 2 years ago

Testing Output:

Coming Soon!

Coverage Stats:

Reading tracefile logs/coverage.info
            |Lines       |Functions  |Branches    
Filename    |Rate     Num|Rate    Num|Rate     Num
==================================================
[/]
blinky.v    | 100%     15|    -     0|    -      0
==================================================
      Total:| 100%     15|    -     0|    -      0

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:    40/ 5280     0%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:     9/   96     9%
                   SB_GB:     2/    8    25%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'CLK$SB_IO_IN_$glb_clk': 74.76 MHz (PASS at 12.00 MHz)

Coverage Stats:

Reading tracefile logs/coverage.info
            |Lines       |Functions  |Branches    
Filename    |Rate     Num|Rate    Num|Rate     Num
==================================================
[/]
blinky.v    | 100%     15|    -     0|    -      0
==================================================
      Total:| 100%     15|    -     0|    -      0

github-actions[bot] commented 2 years ago

Testing Output:

Coming Soon!

Coverage Stats:

Reading tracefile logs/coverage.info
            |Lines       |Functions  |Branches    
Filename    |Rate     Num|Rate    Num|Rate     Num
==================================================
[/]
blinky.v    | 100%     15|    -     0|    -      0
==================================================
      Total:| 100%     15|    -     0|    -      0

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:    40/ 5280     0%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:     9/   96     9%
                   SB_GB:     2/    8    25%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'CLK$SB_IO_IN_$glb_clk': 74.76 MHz (PASS at 12.00 MHz)

jjhorton commented 2 years ago

Need to add VCD file plot into comment using: https://github.com/nanamake/vcd2json

To use this any blank lines will need to be removed from the vcd file first

github-actions[bot] commented 2 years ago

Testing Output:

Coming Soon!

Coverage Stats:

Reading tracefile logs/coverage.info
            |Lines       |Functions  |Branches    
Filename    |Rate     Num|Rate    Num|Rate     Num
==================================================
[/]
blinky.v    | 100%     15|    -     0|    -      0
==================================================
      Total:| 100%     15|    -     0|    -      0

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:    40/ 5280     0%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:     9/   96     9%
                   SB_GB:     2/    8    25%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'CLK$SB_IO_IN_$glb_clk': 74.76 MHz (PASS at 12.00 MHz)

github-actions[bot] commented 2 years ago

Testing Output: <img src="https://svg.wavedrom.com/ { "head": {"tock":1}, "signal": [ { "name": "CLK" , "wave": "p..................." }, {}, ["10", { "name": "LED" , "wave": "=.......=........=..", "data": "01 02 04" }, { "name": "counter", "wave": "====================", "data": "1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2" }, { "name": "display", "wave": "=.......=........=..", "data": "01 02 04" } ], {}, ["210", { "name": "LED" , "wave": "=.....=........=....", "data": "04 08 10" }, { "name": "counter", "wave": "====================", "data": "3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4" }, { "name": "display", "wave": "=.....=........=....", "data": "04 08 10" } ], {}, ["410", { "name": "LED" , "wave": "=...=........=......", "data": "10 20 40" }, { "name": "counter", "wave": "====================", "data": "5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6" }, { "name": "display", "wave": "=...=........=......", "data": "10 20 40" } ], {}, ["610", { "name": "LED" , "wave": "=.=........=........", "data": "40 80 01" }, { "name": "counter", "wave": "====================", "data": "7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8" }, { "name": "display", "wave": "=.=........=........", "data": "40 80 01" } ], {}, ["810", { "name": "LED" , "wave": "=........=.....", "data": "02 04" }, { "name": "counter", "wave": "===============", "data": "0 1 2 3 4 5 6 7 8 0 1 2 3 4 5" }, { "name": "display", "wave": "=........=.....", "data": "02 04" } ] ] } {WAVEDROM SOURCE}/> Coverage Stats:

Reading tracefile logs/coverage.info
            |Lines       |Functions  |Branches    
Filename    |Rate     Num|Rate    Num|Rate     Num
==================================================
[/]
blinky.v    | 100%     15|    -     0|    -      0
==================================================
      Total:| 100%     15|    -     0|    -      0

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:    40/ 5280     0%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:     9/   96     9%
                   SB_GB:     2/    8    25%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'CLK$SB_IO_IN_$glb_clk': 74.76 MHz (PASS at 12.00 MHz)

github-actions[bot] commented 2 years ago

Testing Output: <img src="https://svg.wavedrom.com/{ "head": {"tock":1}, "signal": [ { "name": "CLK" , "wave": "p..................." }, {}, ["10", { "name": "LED" , "wave": "=.......=........=..", "data": "01 02 04" }, { "name": "counter", "wave": "====================", "data": "1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2" }, { "name": "display", "wave": "=.......=........=..", "data": "01 02 04" } ], {}, ["210", { "name": "LED" , "wave": "=.....=........=....", "data": "04 08 10" }, { "name": "counter", "wave": "====================", "data": "3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4" }, { "name": "display", "wave": "=.....=........=....", "data": "04 08 10" } ], {}, ["410", { "name": "LED" , "wave": "=...=........=......", "data": "10 20 40" }, { "name": "counter", "wave": "====================", "data": "5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6" }, { "name": "display", "wave": "=...=........=......", "data": "10 20 40" } ], {}, ["610", { "name": "LED" , "wave": "=.=........=........", "data": "40 80 01" }, { "name": "counter", "wave": "====================", "data": "7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8" }, { "name": "display", "wave": "=.=........=........", "data": "40 80 01" } ], {}, ["810", { "name": "LED" , "wave": "=........=.....", "data": "02 04" }, { "name": "counter", "wave": "===============", "data": "0 1 2 3 4 5 6 7 8 0 1 2 3 4 5" }, { "name": "display", "wave": "=........=.....", "data": "02 04" } ] ]}/>Coverage Stats:

Reading tracefile logs/coverage.info
            |Lines       |Functions  |Branches    
Filename    |Rate     Num|Rate    Num|Rate     Num
==================================================
[/]
blinky.v    | 100%     15|    -     0|    -      0
==================================================
      Total:| 100%     15|    -     0|    -      0

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:    40/ 5280     0%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:     9/   96     9%
                   SB_GB:     2/    8    25%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'CLK$SB_IO_IN_$glb_clk': 74.76 MHz (PASS at 12.00 MHz)

github-actions[bot] commented 2 years ago

Testing Output: Coverage Stats:

Reading tracefile logs/coverage.info
            |Lines       |Functions  |Branches    
Filename    |Rate     Num|Rate    Num|Rate     Num
==================================================
[/]
blinky.v    | 100%     15|    -     0|    -      0
==================================================
      Total:| 100%     15|    -     0|    -      0

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:    40/ 5280     0%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:     9/   96     9%
                   SB_GB:     2/    8    25%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'CLK$SB_IO_IN_$glb_clk': 74.76 MHz (PASS at 12.00 MHz)

github-actions[bot] commented 2 years ago

Testing Output: Coverage Stats:

Reading tracefile logs/coverage.info
            |Lines       |Functions  |Branches    
Filename    |Rate     Num|Rate    Num|Rate     Num
==================================================
[/]
blinky.v    | 100%     15|    -     0|    -      0
==================================================
      Total:| 100%     15|    -     0|    -      0

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:    40/ 5280     0%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:     9/   96     9%
                   SB_GB:     2/    8    25%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'CLK$SB_IO_IN_$glb_clk': 74.76 MHz (PASS at 12.00 MHz)

github-actions[bot] commented 2 years ago

Testing Output: Coverage Stats:

Reading tracefile logs/coverage.info
            |Lines       |Functions  |Branches    
Filename    |Rate     Num|Rate    Num|Rate     Num
==================================================
[/]
blinky.v    | 100%     15|    -     0|    -      0
==================================================
      Total:| 100%     15|    -     0|    -      0

github-actions[bot] commented 2 years ago

FPGA Place and Route statistics:


 Device utilisation:
             ICESTORM_LC:    40/ 5280     0%
            ICESTORM_RAM:     0/   30     0%
                   SB_IO:     9/   96     9%
                   SB_GB:     2/    8    25%
            ICESTORM_PLL:     0/    1     0%
             SB_WARMBOOT:     0/    1     0%
            ICESTORM_DSP:     0/    8     0%
          ICESTORM_HFOSC:     0/    1     0%
          ICESTORM_LFOSC:     0/    1     0%
                  SB_I2C:     0/    2     0%
                  SB_SPI:     0/    2     0%
                  IO_I3C:     0/    2     0%
             SB_LEDDA_IP:     0/    1     0%
             SB_RGBA_DRV:     0/    1     0%
          ICESTORM_SPRAM:     0/    4     0%

 Max frequency for clock 'CLK$SB_IO_IN_$glb_clk': 74.76 MHz (PASS at 12.00 MHz)

jjhorton / PMod

LED Firmware Testing #53