HDLC code should use DMA for transmit

[jkominek]

The HDLC code on the ADC board (which will need to be generalized for use on the main board as well), currently receives data over the UART using DMA. Character recognition on the HDLC frame byte is used to trigger a UART interrupt to process the received data. Works great.

But the board still uses the dumb method of sending data, with the CPU spinning while it waits. Even at 3Mbps the UART is very slow compared to the CPU (480MHz vs 300kB/s). We're burning 1600 CPU cycles for every byte, once the FIFO fills up.

Instead, we should maintain a circular buffer for DMA transmit. Note, we don't want to put the DMA transfer into actual circular mode. Rather, the send function should tack bytes onto the end of the buffer, and if no transfer is currently in progress start one. Then the DMA transfer complete interrupt handler should check to see if there are unsent bytes in the buffer, and if so, begin a new transfer.

(The code which writes into the outgoing buffer could also add in a bit of smarts, and send fewer HDLC frame bytes, depending on what it sees in the buffer already.)

That should free up quite a bit of CPU time, and work quite nicely even with the priority of the DMA transfer lowered, as the UART has its own FIFO to help smooth things over.

[jkominek]

implemented in 62145be

[jkominek]

nope, sporadically bugged.

[jkominek]

ok, 821dc32 appears to take care of it, even under some load testing.