jnk0le / XTightlyCoupledIO

custom riscv extension to provide directly accessed peripheral registers
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`tio.fcvt.wu.s` #26

Open jnk0le opened 12 months ago

jnk0le commented 12 months ago

probably highly problematic, replaces only 2 instructions

    fcvt.w.s a1, fa3
    tio.max HRTIM1_TIMA_CMP1xR, a1, zero
jnk0le commented 11 months ago

or

    fcvt.wu.s a1, fa3
    tio.mv HRTIM1_TIMA_CMP1xR, a1

negative float to unsigned is UB in C/C++ though. Saturation breaks on some archs (e.g. x86)