@joelverhagen, can I ask you a huge favor? 😁
I modified the SIMD logic to avoid the PEXT instruction, and I'm wondering if you would run the benchmarks (just Sylvan) on your machine against package version 1.1.6-b0001 and report back the timing. I've no access to a Zen2, so I have no way to test whether the logic change will perform better. The timing is essentially unchanged when running on my Intel chip.
joelverhagen
commented
3 years ago
@joelverhagen, can I ask you a huge favor? 😁 I modified the SIMD logic to avoid the PEXT instruction, and I'm wondering if you would run the benchmarks (just Sylvan) on your machine against package version 1.1.6-b0001 and report back the timing. I've no access to a Zen2, so I have no way to test whether the logic change will perform better. The timing is essentially unchanged when running on my Intel chip.
Originally posted by @MarkPflug in https://github.com/joelverhagen/NCsvPerf/issues/38#issuecomment-896112330