This affects only Teensy 3.2
The Teensy loses time while in the ISR, while the code (and design) assumed that this loss would be negligible. But, tests with an oscilloscope have confirmed that the loss is significant ~20usec on avg. per ISR.
The only solution is to apply a compensation in the scheduling of "the-coming-ISR". IMO, any design would require a compensation of this sort.
A portable solution is to Measure time spent in ISR using another Timer and compensate. This is better than hardcoding time spent in interrupts, because time depends on the clock speed (Teensy's clock speed can be changed easily!).
This affects only Teensy 3.2 The Teensy loses time while in the ISR, while the code (and design) assumed that this loss would be negligible. But, tests with an oscilloscope have confirmed that the loss is significant ~20usec on avg. per ISR.
The only solution is to apply a compensation in the scheduling of "the-coming-ISR". IMO, any design would require a compensation of this sort.
A portable solution is to Measure time spent in ISR using another Timer and compensate. This is better than hardcoding time spent in interrupts, because time depends on the clock speed (Teensy's clock speed can be changed easily!).