Closed joshuajayg closed 4 years ago
Looks like I'm picking up a lot of noise on the sense lines. Possibly the inverter carrier frequency used to create the sine wave. Higher frequency is close to 10khz. I'll change to shielded wires and I'll move the board further away from the inverter and see how that works. The 60hz dip makes sense. Every time the inverter produces a sine wave, there is a pulse of power input specifically at 90 degrees. Also, the carrier frequency increases amplitude when the 60hz voltage dips which would coincide with increased load. It's the high voltage carrier frequency that bothers me.
I have replaced the cables with twisted pair and the error is greatly improved. I have also redesigned the PCB to account for an an imbalance in loading the sense wires. Both ICs on one channel were designed to pull their Vin current from one sense line. This would cause a small (170uV) drop in voltage across the sense wire if it's 3 feet long and 24awg (typical for CAT5). Now the IC Vin lines are tied to the same input as the buck converter input. I will be milling a new PCB soon to test this.
I have redesigned the board to allow a separate power supply line to feed all the current sense amplifier ICs. This has fixed all but the smallest about of ripple in the "auxiliary" readings. The past couple months of testing have shown a negligible amount of error in the auxiliary and therefore calculated battery readings.
When the auxiliary bus has no load and the inverter is loaded (which it always it), the auxiliary sensors indicate a positive amperage. This issue is significant in that it causes bad state of charge calculations over the course of several hours. If the inverter idles at -3.5A all night and the auxiliary bus is indicating 1.2A, the SOC will be miscalculated by 30% over that time.
I know very little about PCB layout so would appreciate help. Any ideas @csatt @mohitbhoite ?
The noise on the Auxiliary graph is visible when comparing amp readings across the different sensors at the same time.