Change to asynchronous negative edge reset

jotego / jt12

FM sound source written in Verilog, fully compatible with YM2612, YM3438 (JT12), YM2203 (JT03) and YM2610 (JT10)

GNU General Public License v3.0

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Closed jotego closed 4 years ago

jotego commented 5 years ago

This eases implementation

jotego commented 4 years ago

I have kept the same positive reset but it is asynchronous now.