simson: check FM/ADPCM sound balance

[jotego]

FM is allegedly too loud in the beta

[jotego]

It is too loud indeed. Checked in published version v1.3.1 Sound fades away and stops in commit 74f67e4 Running a git bisect shows that the commit that broke the sound was 2181513a25dcb2aafa13774d037bd0841392e88b, which points to a problem with the cen signals

[jotego]

The cen_fm/cen_fm2 signals that work correctly are aligned (2a032d81):

The failing one is not aligned:

[jotego]

This fixes the issue in the broken commit because it aligns the edges. But why does cen_fm (used by the CPU) need alignment with JT51's cen_fm2?

reg aux=0;
wire cen_fmx = cen_fm & aux;

always @(posedge clk) if(cen_fm) aux <= ~aux;

jt51 u_jt51(
    .rst        ( rst       ), // reset
    .clk        ( clk       ), // main clock
    .cen        ( 1'b0      ),
    .cen_p1     ( cen_fmx   ),

[jotego]

• Capturing the write with an edge in JT51 does not work: if( write && !wrl )
• It does not fail in simulation (tested up to 35s in game)
• Making the sample signal last for more than one clock cycle does not fix it assign sample = zero;
• Replicated on Pocket/MiST
• Modifying the generation of the busy signal to bypass the cen does not work:

      busy <= write&a0 | (busy & ~nx_busy[5]);
      if(cen) busy_cnt <= nx_busy[4:0];

[jotego]

Fail mechanism

A new NMI event is produced right after the NMI flip flop (instance u_edge) has been cleared. That leaves the nmi_n signal low. Because NMI is edge triggered, the CPU will not recognize it again and it will not clear the flip flop. The CPU states in a halt state as it executes a halt instruction after clearing the NMI in the first place.

This can be reproduced with the ghdl-translated T80L VHD code.

With the cen signals aligned, the new NMI request occurs at the same time as the clear signal, which takes precedence. So the NMI does not get re-triggered too early and everything works.

This almost looks as though the timing had been measured on the Z80 software to match the YM2151 counter.