find constants that can be added together

[Zer0xFF]

in theory the same condition will work as is if innerStatement.op == OP_SUB

edit: for the 2nd commit, I used CopyPropagation() as base, since it didn't fit in the required model for optimisation, if you have a suggestion for a different name?

the 2nd commit finds

REG[0] := REG[6] + 1
REG[0] := REG[0] << 4

applies left shift to the constant, then swaps the 2 statements around, to ensure we don't apply the shift multiple times

in doing so coupled with the 1st commit, we can find optimisations such as this

REG[0] := REG[6] + 1
REG[0] := REG[0] << 4
REG[0] := REG[0] + 4

-->

REG[0] := REG[6] << 4
REG[0] := REG[0] + 16
REG[0] := REG[0] + 4

-->

REG[0] := REG[6] << 4
REG[0] := REG[0] + 20

[jpd002]

I've been struggling to find a good name for CopyPropagation2. I think the best I can come up with is ReorderAdd. Other compilers have similar passes (https://llvm.org/doxygen/Reassociate_8cpp_source.html, https://gcc.gnu.org/onlinedocs/gccint/Insn-Canonicalizations.html), but I don't know if that one is similar.

Also, I don't think it's worth making this more general, since this seem to only apply to the case we see in VUShared::ComputeMemAccessAddr.

[Zer0xFF]

I've been struggling to find a good name for CopyPropagation2.

Alex keeps reminding me of this There are only two hard things in Computer Science: cache invalidation, naming things, and off-by-one errors.

I think the name makes sense (we can make it even more explicit, name wise, by calling ti ReorderAddLeftShift)

[jpd002]

Haha, indeed!

Let's keep it as ReorderAdd in case we want to handle other ADD combos later (ex.: ADD + MUL, ADD + SRL, etc.).

Thanks for this!