This one is awful - it depends on none of the Genesis hardware being allowed to write to PRG RAM while the sub CPU is on the bus. The Z80 is executing a nonsensical routine that is constantly zeroing out a chunk of PRG RAM using LDIR instructions, and if those writes are allowed to go through then the sub CPU will eventually hit an address error and crash when it tries to use that section of PRG RAM.
This one is awful - it depends on none of the Genesis hardware being allowed to write to PRG RAM while the sub CPU is on the bus. The Z80 is executing a nonsensical routine that is constantly zeroing out a chunk of PRG RAM using LDIR instructions, and if those writes are allowed to go through then the sub CPU will eventually hit an address error and crash when it tries to use that section of PRG RAM.