Bandwidth of Mixer stage

[ArjanteMarvelde]

Hello Klaus,

First of all, thanks for continuing and improving my uSDR-Pico project! Bumping into your you tube channel actually inspired me to dig up the project once more.

I am now in the progress of reviewing and cleaning-up the schematics, and was re-calculating the bandwidths of the several filtering stages in the HW. As I use only 3kHz or so of net audio bandwidth, I have based all filters on that. But now I realize this is incorrect, since I actually use 15625 samples per second rate as basis for DSP.

• The detector bandwidth is determined by the input impedance (50 Ohms) plus the switch resistance and the integration capacitor. With the current 220nF I get to about 3.4kHz, taking into account the per-phase 25% duty cycle of the switch.
• The integration differential amplifiers are set to about 2kHz (82k/1nF) which already seems too low.
• The path to the QSE starts with a 3.4kHz low pass (10k/4.7nF)
• The exciter driver has a 16kHz low pass filter.

In your adapted case you drill the signal processing bandwidth up by a factor 10 or so, to enable a wider bandwidth view for the waterfall. So my question is: what is your take on this, did you take the bandwidths into account in your re-design?

Cheers, Arjan

[kaefe64]

Hi Arjan

Thank you for getting in touch. I "messed up" your project a little, I hope you are ok with that. Changing from Visual Studio to Arduino IDE, changing the name, including an Arduino Pro Mini for band switch and more... If you don't like anything or have a comment, please tell me. Initally I was interested only to include the waterfall display, but some other changes were necessary.

About your comment: if you use AD with 15625 samples per second rate, the 3kHz filter for audio looks ok for me. Why do you think it is wrong? I did not make much calculation to the input filter, after the mixer switching, I based partially in the Softrock RXTX and some practical tests. If you have a better suggestion for me, please tell me. I want a 80kHz bandwidth amplifier/filter at RX. As I have this wider bandwidth, I need to deal with strong signals out of the center frequency, saturating the amplifier and/or the AD. That is why I get some "mirror" signals on the waterfall sometimes. Maybe we can talk about this...

I am not sure about your 16kHz low pass filter exciter driver. If you sample at ~16kHz, the filter should be 8kHz or less, isn't it? I received some request to improve the audio bandwidth (TX at first). I believe there are some HI-FI hamradio out there with 6kHz audio bandwidth...

I also received some requests to improve the S meter. This is really an issue. I will need to calculate or measure the antenna to AD gain, more the internal attenuation/gain, and I did not find a good way to do it. And this is hardware/gain dependent, so we will need an factor adjusted on software. It is on hold...

I also want to use the advantage to have the Arduino Pro Mini reading the SWR to show it at the display. This is almost done, I just need to read the I2C and put it at the display.

There are other things to improve... AM reception, waterfall zoom, RIT...

But I already made some contacts on 40m with the Arjan-5/uSDR-Pico, quite rewarding.

Thank you Klaus F PY2KLA

[ArjanteMarvelde]

Hi Klaus,

Audio side filtering to 3kHz obviously is okay (unless you want HiFi AM...) but on the mixer-side you might need more than that. If you need a bandwidth of 80kHz I guess that the mixer should be able to pass on this band without attenuation.

In my reasoning, for example the integration capacitors in the RX chain will have to be a lot smaller than in my V3.0 schematics. The RX mixer bandwidth is determined by RF side impedance (50 Ohm), switch on impedance (4 Ohm) and integration capacitors: Fc = 1/(2 . pi . 54 . C . 4) The factor 4 comes from the 4 phases, each contributing only 25%. So for 80kHz the C can only be 10nF or so.

Same storyline applies to the integration OpAmps, where the RC in the feedback branch determine the bandwidth: Fc=1/(2 . pi . R . C), in the V3.0 mixer that is only 2kHz or so.

Same reasoning could be applied to the TX stream.

In the FFT signal processing of V3.0 I place my centre frequency on an offset of 3700 Hz in a 7800Hz spectrum. I think I am losing a lot of sensitivity by using the filters as described, don't you think so?

Anyhow, I am contemplating an experiment, changing the values appropriately and see how it works. In any case in the upcoming V4.0 I will do so.

Cheers, Arjan

[ArjanteMarvelde]

About your questions:

• Strong signal handling, I suppose you need to manage out of band signals by proper filtering in the mixer or the subsequent IF stage. But strong signals inside the IF spectrum are an issue, this needs to be accommodated by the ADC dynamic range, so I suppose that you would have to AGC the peaks down into that range. I have been thinking about how to have an external AGC control from Pico to IF stage, but dismissed it because that would overcomplicate this simple design.
• S-Meter, I have been struggling with this too. In v3.x I have made at least a logarithmic scaling, but of course absolute reference depends on a lot of implementation factors. I forget what my reasoning for this was, in principle there is an absolute signal strength associated with S9, and you need to relate this level to what is input into the Pico ADC.
• About your changes: that's what this experiment is for, isn't it? I don't know about you, but I certainly am not going to turn this into a product, too much fun experimenting. Indeed, the signal processing is a big open field to explore!

[ArjanteMarvelde]

I've looked at the RSSI (low pass filtered signal amplitude) to S-value conversion: The RSSI is input for the S-meter value function. The scale is logarithmic; up to S9 each 3dBV RSSI step corresponds with 1 S-level. Absolute S9 signal level is defined to be -73dBm in 50 Ω, which corresponds with 50.1uV. Assuming unity gain in the mixer, the total voltage gain is primarily determined by the IF amplifier, which is targeted at approximately 300x. Then S9 should correspond to 14.4mV signal on the IF output/ADC input. Every +10 step above S9 multiplies this voltage level with 10^0.5=3.16. In the signal acquisition there is an integration gain factor (in V3.0), adding 8 samples stretching the effective ADC range up to 16384. This theoretically limits the RX sensitivity down to about S2 when max is set to S9+40. In practise noise levels will be much higher than S2 though.

[kaefe64]

Hi, and remember the attenuators could be ON.