Based blink example need SPI in led_strip for ESP32-S3.
My port to build using zig cc w/ build.zig, works. (lighting blink - white color RGB) vscode (espressif ext) overwrite zig-build object to add lib.cc in main/cmakelists.txt.
Need add src from components on build.zig to add on libzig.a or get libdriver.a (build folder).
esp32s3 device
**Zig: No blink**
```bash
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x1 (POWERON),boot:0x8 (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3810,len:0x178c
load:0x403c9700,len:0x4
load:0x403c9704,len:0xcbc
load:0x403cc700,len:0x2d94
entry 0x403c9914
I (27) boot: ESP-IDF v5.3-dev 2nd stage bootloader
I (27) boot: compile time Mar 22 2024 13:41:12
I (27) boot: Multicore bootloader
I (30) boot: chip revision: v0.2
I (34) boot.esp32s3: Boot SPI Speed : 80MHz
I (39) boot.esp32s3: SPI Mode : DIO
I (43) boot.esp32s3: SPI Flash Size : 2MB
I (48) boot: Enabling RNG early entropy source...
I (54) boot: Partition Table:
I (57) boot: ## Label Usage Type ST Offset Length
I (64) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (72) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (79) boot: 2 factory factory app 00 00 00010000 00100000
I (87) boot: End of partition table
I (91) esp_image: segment 0: paddr=00010020 vaddr=3c030020 size=0d318h ( 54040) map
I (109) esp_image: segment 1: paddr=0001d340 vaddr=3fc91300 size=02ab0h ( 10928) load
I (112) esp_image: segment 2: paddr=0001fdf8 vaddr=40374000 size=00220h ( 544) load
I (116) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=21bech (138220) map
I (150) esp_image: segment 4: paddr=00041c14 vaddr=40374220 size=0d014h ( 53268) load
I (167) boot: Loaded app from partition at offset 0x10000
I (167) boot: Disabling RNG early entropy source...
I (178) cpu_start: Multicore app
I (189) cpu_start: Pro cpu start user code
I (189) cpu_start: cpu freq: 160000000 Hz
I (189) cpu_start: Application information:
I (192) cpu_start: Project name: zig-sample-idf
I (197) cpu_start: App version: 754cced-dirty
I (203) cpu_start: Compile time: Mar 22 2024 13:41:07
I (209) cpu_start: ELF file SHA256: 31480b3da...
I (214) cpu_start: ESP-IDF: v5.3-dev
I (219) cpu_start: Min chip rev: v0.0
I (224) cpu_start: Max chip rev: v0.99
I (229) cpu_start: Chip rev: v0.2
I (234) heap_init: Initializing. RAM available for dynamic allocation:
I (241) heap_init: At 3FC946C0 len 00055050 (340 KiB): RAM
I (247) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (253) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (259) heap_init: At 600FE010 len 00001FD8 (7 KiB): RTCRAM
I (266) spi_flash: detected chip: winbond
I (270) spi_flash: flash io: dio
W (274) spi_flash: Detected size(16384k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (287) sleep: Configure to isolate all GPIO pins in sleep state
I (294) sleep: Enable automatic switching of GPIO sleep configuration
I (302) main_task: Started on CPU0
I (312) main_task: Calling app_main()
[info] (esp-idf): Hello, world from Zig!
[info] (esp-idf):
[Zig Info]
* Version: 0.12.0
* Compiler backend: stage2_llvm
[ESP-IDF Info]
* Version: 5.3.0
[Memory Info]
* Free: 388424
* Minimum: 388424
Let's have a look at your shiny xtensa - esp32s3 system! :)
```
### Running original blink_example on main/cmake
![IMG_20240322_153708](https://github.com/kassane/zig-esp-idf-sample/assets/6756180/e19f8507-08d9-4f29-bb8f-cb41611f5fc6)
But, zig solution:
/home/kassane/.espressif/tools/xtensa-esp-elf/esp-13.2.0_20230928/xtensa-esp-elf/bin/../lib/gcc/xtensa-esp-elf/13.2.0/../../../../xtensa-esp-elf/bin/ld: warning: /home/kassane/.espressif/tools/xtensa-esp-elf/esp-13.2.0_20230928/xtensa-esp-elf/bin/../lib/gcc/xtensa-esp-elf/13.2.0/esp32s3/no-rtti/crtn.o: missing .note.GNU-stack section implies executable stack
/home/kassane/.espressif/tools/xtensa-esp-elf/esp-13.2.0_20230928/xtensa-esp-elf/bin/../lib/gcc/xtensa-esp-elf/13.2.0/../../../../xtensa-esp-elf/bin/ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker
/home/kassane/.espressif/tools/xtensa-esp-elf/esp-13.2.0_20230928/xtensa-esp-elf/bin/../lib/gcc/xtensa-esp-elf/13.2.0/../../../../xtensa-esp-elf/bin/ld: warning: zig-sample-idf.elf has a LOAD segment with RWX permissions
/home/kassane/.espressif/tools/xtensa-esp-elf/esp-13.2.0_20230928/xtensa-esp-elf/bin/../lib/gcc/xtensa-esp-elf/13.2.0/../../../../xtensa-esp-elf/bin/ld: lib/libzig.a(/home/kassane/espressif/zig-esp-idf-sample/build/zig-cache/o/675173f98f048506fcd2c2222bddedab/libzig.a.o):(.literal+0xd4): undefined reference to `led_strip_new_spi_device'
/home/kassane/.espressif/tools/xtensa-esp-elf/esp-13.2.0_20230928/xtensa-esp-elf/bin/../lib/gcc/xtensa-esp-elf/13.2.0/../../../../xtensa-esp-elf/bin/ld: lib/libzig.a(/home/kassane/espressif/zig-esp-idf-sample/build/zig-cache/o/675173f98f048506fcd2c2222bddedab/libzig.a.o):(.literal+0xd8): undefined reference to `led_strip_clear'
/home/kassane/.espressif/tools/xtensa-esp-elf/esp-13.2.0_20230928/xtensa-esp-elf/bin/../lib/gcc/xtensa-esp-elf/13.2.0/../../../../xtensa-esp-elf/bin/ld: lib/libzig.a(/home/kassane/espressif/zig-esp-idf-sample/build/zig-cache/o/675173f98f048506fcd2c2222bddedab/libzig.a.o):(.literal+0xe0): undefined reference to `led_strip_set_pixel'
/home/kassane/.espressif/tools/xtensa-esp-elf/esp-13.2.0_20230928/xtensa-esp-elf/bin/../lib/gcc/xtensa-esp-elf/13.2.0/../../../../xtensa-esp-elf/bin/ld: lib/libzig.a(/home/kassane/espressif/zig-esp-idf-sample/build/zig-cache/o/675173f98f048506fcd2c2222bddedab/libzig.a.o):(.literal+0xe4): undefined reference to `led_strip_refresh'
collect2: error: ld returned 1 exit status
ninja: build stopped: subcommand failed.
Based blink example need SPI in
led_strip
for ESP32-S3.My port to build usingvscode (espressif ext) overwrite zig-build object to addzig cc
w/build.zig
, works. (lighting blink - white color RGB)lib.cc
inmain/cmakelists.txt
.Need add src from components on
build.zig
to add onlibzig.a
or getlibdriver.a
(build folder).esp32s3 device
**Zig: No blink** ```bash ESP-ROM:esp32s3-20210327 Build:Mar 27 2021 rst:0x1 (POWERON),boot:0x8 (SPI_FAST_FLASH_BOOT) SPIWP:0xee mode:DIO, clock div:1 load:0x3fce3810,len:0x178c load:0x403c9700,len:0x4 load:0x403c9704,len:0xcbc load:0x403cc700,len:0x2d94 entry 0x403c9914 I (27) boot: ESP-IDF v5.3-dev 2nd stage bootloader I (27) boot: compile time Mar 22 2024 13:41:12 I (27) boot: Multicore bootloader I (30) boot: chip revision: v0.2 I (34) boot.esp32s3: Boot SPI Speed : 80MHz I (39) boot.esp32s3: SPI Mode : DIO I (43) boot.esp32s3: SPI Flash Size : 2MB I (48) boot: Enabling RNG early entropy source... I (54) boot: Partition Table: I (57) boot: ## Label Usage Type ST Offset Length I (64) boot: 0 nvs WiFi data 01 02 00009000 00006000 I (72) boot: 1 phy_init RF data 01 01 0000f000 00001000 I (79) boot: 2 factory factory app 00 00 00010000 00100000 I (87) boot: End of partition table I (91) esp_image: segment 0: paddr=00010020 vaddr=3c030020 size=0d318h ( 54040) map I (109) esp_image: segment 1: paddr=0001d340 vaddr=3fc91300 size=02ab0h ( 10928) load I (112) esp_image: segment 2: paddr=0001fdf8 vaddr=40374000 size=00220h ( 544) load I (116) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=21bech (138220) map I (150) esp_image: segment 4: paddr=00041c14 vaddr=40374220 size=0d014h ( 53268) load I (167) boot: Loaded app from partition at offset 0x10000 I (167) boot: Disabling RNG early entropy source... I (178) cpu_start: Multicore app I (189) cpu_start: Pro cpu start user code I (189) cpu_start: cpu freq: 160000000 Hz I (189) cpu_start: Application information: I (192) cpu_start: Project name: zig-sample-idf I (197) cpu_start: App version: 754cced-dirty I (203) cpu_start: Compile time: Mar 22 2024 13:41:07 I (209) cpu_start: ELF file SHA256: 31480b3da... I (214) cpu_start: ESP-IDF: v5.3-dev I (219) cpu_start: Min chip rev: v0.0 I (224) cpu_start: Max chip rev: v0.99 I (229) cpu_start: Chip rev: v0.2 I (234) heap_init: Initializing. RAM available for dynamic allocation: I (241) heap_init: At 3FC946C0 len 00055050 (340 KiB): RAM I (247) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM I (253) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM I (259) heap_init: At 600FE010 len 00001FD8 (7 KiB): RTCRAM I (266) spi_flash: detected chip: winbond I (270) spi_flash: flash io: dio W (274) spi_flash: Detected size(16384k) larger than the size in the binary image header(2048k). Using the size in the binary image header. I (287) sleep: Configure to isolate all GPIO pins in sleep state I (294) sleep: Enable automatic switching of GPIO sleep configuration I (302) main_task: Started on CPU0 I (312) main_task: Calling app_main() [info] (esp-idf): Hello, world from Zig! [info] (esp-idf): [Zig Info] * Version: 0.12.0 * Compiler backend: stage2_llvm [ESP-IDF Info] * Version: 5.3.0 [Memory Info] * Free: 388424 * Minimum: 388424 Let's have a look at your shiny xtensa - esp32s3 system! :) ``` ### Running original blink_example on main/cmake ![IMG_20240322_153708](https://github.com/kassane/zig-esp-idf-sample/assets/6756180/e19f8507-08d9-4f29-bb8f-cb41611f5fc6)But, zig solution:
Full-log: led_strip.log