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kendryte / k230_sdk

Kendryte K230 SDK
BSD 2-Clause "Simplified" License
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[help]: K230 data caching for addr range #55

Closed yf13 closed 7 months ago

yf13 commented 7 months ago

Help

I am wondering how to share a memory zone between two CPU cores in SRAM or DDR?

Currently I am using volatile pointers to access the data fields from two cores in M-mode, but still got different data. I am wondering that the independent CPU caches are causing inconsistency.

Can you please teach if there is any way to set that memory zone as non-cacheable for both cores? if not, do you have any suggestions?

yf13 commented 7 months ago

close this as M-mode doesn't have cacheability control.