kevinpt / hdlparse

Simple parser for extracting VHDL documentation
http://kevinpt.github.io/hdlparse/
MIT License
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Documentation bug `extract_objects_from_source` #20

Open michael-etzkorn opened 3 years ago

michael-etzkorn commented 3 years ago

The following code snippet in the documentation uses extract_objects_from_source when it should use extract_objects

import hdlparse.verilog_parser as vlog

vlog_ex = vlog.VerilogExtractor()
vlog_mods = vlog_ex.extract_objects_from_source('example.v')

for m in vlog_mods:
  print('Module "{}":'.format(m.name))

  print('  Parameters:')
  for p in m.generics:
    print('\t{:20}{:8}{}'.format(p.name, p.mode, p.data_type))

  print('  Ports:')
  for p in m.ports:
    print('\t{:20}{:8}{}'.format(p.name, p.mode, p.data_type))