Open david-oswald opened 3 years ago
Similarly, it seems that the FPU exception flags are not cleared on enclave exit, hence the untrusted host can determine whether any FPU overflow/underflow exceptions have occurred - this can be used as a controlled channel in certain situations to extract enclave secrets (see the paper). PoC here:
Finally, I'm not quite sure but it seems to me that the FPU registers (f0
- f31
) are not cleared by the SM, which of course would lead to leakage as well.
Not quite sure where to open this issue, I put it here - if you think it should go somewhere else feel free to close this issue and put it where it belongs.
The initial idea for this issue comes from one of our recent papers: https://jovanbulck.github.io/files/acsac20-fpu.pdf where we reported similar issues in several SGX runtimes (including MS OE and Intel SDK).
The basic problem is that the global RISC-V FPU rounding control register
frm
is apparently not sanitised on enclave entry. This means that an untrusted attacker can change the rounding mode outside the enclave and - depending on the setting - the enclave will give different outputs for floating point computations.See here for a (hacky) diff that - when applied to master - demonstrates this with the
hello-native
QEMU example:poc_fpu_poisoning.txt
Basically this performs a floating-point computation (
2.1 * 3.4
) in the enclave with different rounding modes set from the untrusted host throughfesetround()
. The output is something like this:This issue could be mitigated by setting a fixed
frm
on enclave entry, and restoring the previousfrm
on exit. This could probably either happen in the SM or the runtime, depending on what you think is best.