K10 DDR2 timing lack of implementation

kszysiu / turionpowercontrol-archive-20150824

Turion Power Control archive, 20150824

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K10 DDR2 timing lack of implementation #3

Closed GoogleCodeExporter closed 9 years ago

GoogleCodeExporter commented 9 years ago

K10 implementation reports bad timing with DDR2-800 and DDR2-1066 DRAM since 
the implementation is done just for DDR3 memories.

Original issue reported on code.google.com by paolo.sa...@gmail.com on 30 May 2011 at 10:38

GoogleCodeExporter commented 9 years ago

[deleted comment]

GoogleCodeExporter commented 9 years ago

This issue has been corrected in commit r22. DDR3, DDR2-1066 and DDR2 timings 
should be reported now. Issues may still exist on correctness of numbers.

Original comment by paolo.sa...@gmail.com on 4 Jul 2011 at 4:27