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kumasento / polsca

Polyhedral High-Level Synthesis in MLIR
MIT License
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[COSIM][2mm][SMALL] mismatched ports #19

Open kumasento opened 3 years ago

kumasento commented 3 years ago

Command

./scripts/pb-flow.py ./example/polybench --work-dir ./tmp/phism/pb-flow.small.polymer --dataset SMALL -p --loop-transforms --array-partition -e 2mm --cosim

Error

ERROR: [VRFC 10-3180] cannot find port 'D_1_q0' on this module [/mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/linear-algebra/kernels/2mm/tb/solution1/sim/verilog/kernel_2mm.autotb.v:246]
ERROR: [VRFC 10-3180] cannot find port 'D_0_q0' on this module [/mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/linear-algebra/kernels/2mm/tb/solution1/sim/verilog/kernel_2mm.autotb.v:241]

Discoveries

From kernel_2mm.v


module kernel_2mm (
        ap_clk,
        ap_rst,
        ap_start,
        ap_done,
        ap_idle,
        ap_ready,
        ni,
        nj,
        nk,
        nl,
        alpha,
        beta,
        tmp_0_address0,
        tmp_0_ce0,
        tmp_0_we0,
        tmp_0_d0,
        tmp_0_q0,
        tmp_0_address1,
        tmp_0_ce1,
        tmp_0_q1,
        tmp_1_address0,
        tmp_1_ce0,
        tmp_1_we0,
        tmp_1_d0,
        tmp_1_q0,
        tmp_1_address1,
        tmp_1_ce1,
        tmp_1_q1,
        A_0_address0,
        A_0_ce0,
        A_0_q0,
        A_1_address0,
        A_1_ce0,
        A_1_q0,
        B_0_address0,
        B_0_ce0,
        B_0_q0,
        B_1_address0,
        B_1_ce0,
        B_1_q0,
        B_2_address0,
        B_2_ce0,
        B_2_q0,
        C_0_address0,
        C_0_ce0,
        C_0_q0,
        C_1_address0,
        C_1_ce0,
        C_1_q0,
        D_0_address0,
        D_0_ce0,
        D_0_we0,
        D_0_d0,
        D_0_address1,
        D_0_ce1,
        D_0_q1,
        D_1_address0,
        D_1_ce0,
        D_1_we0,
        D_1_d0,
        D_1_address1,
        D_1_ce1,
        D_1_q1
);

From kernel_2mm.autotb.v:

`AUTOTB_DUT `AUTOTB_DUT_INST(
    .ap_clk(ap_clk),
    .ap_rst(ap_rst),
    .ap_start(ap_start),
    .ap_done(ap_done),
    .ap_idle(ap_idle),
    .ap_ready(ap_ready),
    .ni(ni),
    .nj(nj),
    .nk(nk),
    .nl(nl),
    .alpha(alpha),
    .beta(beta),
    .tmp_0_address0(tmp_0_address0),
    .tmp_0_ce0(tmp_0_ce0),
    .tmp_0_we0(tmp_0_we0),
    .tmp_0_d0(tmp_0_d0),
    .tmp_0_q0(tmp_0_q0),
    .tmp_1_address0(tmp_1_address0),
    .tmp_1_ce0(tmp_1_ce0),
    .tmp_1_we0(tmp_1_we0),
    .tmp_1_d0(tmp_1_d0),
    .tmp_1_q0(tmp_1_q0),
    .A_0_address0(A_0_address0),
    .A_0_ce0(A_0_ce0),
    .A_0_q0(A_0_q0),
    .A_1_address0(A_1_address0),
    .A_1_ce0(A_1_ce0),
    .A_1_q0(A_1_q0),
    .B_0_address0(B_0_address0),
    .B_0_ce0(B_0_ce0),
    .B_0_q0(B_0_q0),
    .B_1_address0(B_1_address0),
    .B_1_ce0(B_1_ce0),
    .B_1_q0(B_1_q0),
    .C_0_address0(C_0_address0),
    .C_0_ce0(C_0_ce0),
    .C_0_q0(C_0_q0),
    .C_1_address0(C_1_address0),
    .C_1_ce0(C_1_ce0),
    .C_1_q0(C_1_q0),
    .D_0_address0(D_0_address0),
    .D_0_ce0(D_0_ce0),
    .D_0_we0(D_0_we0),
    .D_0_d0(D_0_d0),
    .D_0_q0(D_0_q0),
    .D_1_address0(D_1_address0),
    .D_1_ce0(D_1_ce0),
    .D_1_we0(D_1_we0),
    .D_1_d0(D_1_d0),
    .D_1_q0(D_1_q0));
  1. autotb presumes the memory partitions of D have only one port.
  2. Phism has 3 partitions for B, while autotb has 2.
kumasento commented 3 years ago

tbgen.tcl

open_project -reset tb
add_files {/mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/linear-algebra/kernels/2mm/2mm.c} -cflags "-I /mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/linear-algebra/kernels/2mm -I /mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/utilities -D SMALL_DATASET" -csimflags "-I /mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/linear-algebra/kernels/2mm -I /mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/utilities -DSMALL_DATASET"
add_files -tb {/mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/linear-algebra/kernels/2mm/2mm.c /mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/utilities/polybench.c} -cflags "-I /mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/linear-algebra/kernels/2mm -I /mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/utilities -DSMALL_DATASET" -csimflags "-I /mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/linear-algebra/kernels/2mm -I /mnt/ccnas2/bdp/rz3515/projects/phism/tmp/phism/pb-flow.small.polymer/utilities -DSMALL_DATASET"
set_top kernel_2mm
open_solution -reset solution1
set_part "zynq"
create_clock -period "100MHz"
config_bind -effort high
set_directive_array_partition -dim 1 -factor 2 -type block "kernel_2mm" tmp
set_directive_array_partition -dim 2 -factor 2 -type block "kernel_2mm" tmp
set_directive_array_partition -dim 1 -factor 2 -type block "kernel_2mm" A
set_directive_array_partition -dim 2 -factor 3 -type block "kernel_2mm" A
set_directive_array_partition -dim 1 -factor 3 -type block "kernel_2mm" B # < ------ Seems that B should be partitioned into 3 parts.
set_directive_array_partition -dim 2 -factor 2 -type block "kernel_2mm" B
set_directive_array_partition -dim 1 -factor 2 -type block "kernel_2mm" C
set_directive_array_partition -dim 2 -factor 3 -type block "kernel_2mm" C
set_directive_array_partition -dim 1 -factor 2 -type block "kernel_2mm" D
set_directive_array_partition -dim 2 -factor 3 -type block "kernel_2mm" D
csim_design
csynth_design
cosim_design
exit
kumasento commented 3 years ago

Mismatched partition has been fixed by #20