Implement machine-mode CSRs

kuznia-rdzeni / coreblocks

RISC-V out-of-order core for education and research purposes

https://kuznia-rdzeni.github.io/coreblocks/

BSD 3-Clause "New" or "Revised" License

33 stars 13 forks source link

Implement machine-mode CSRs #561

Open tilk opened 7 months ago

tilk commented 7 months ago

The CSRs in question are:

[ ] misa
[x] mvendorid
[x] marchid
[x] mimpid
[x] mhartid
[ ] mstatus and mstatush
[x] mtvec
[x] mip and mie
[x] mcycle and minstret
[x] mscratch
[x] mepc
[x] mcause
[ ] mtval
[x] mconfigptr

piotro888 commented 7 months ago

@tilk allocation for marchid. Are names and email good? Approved?

diff --git a/marchid.md b/marchid.md
index 7f85b26..f4a0be0 100644
--- a/marchid.md
+++ b/marchid.md
@@ -59,3 +59,4 @@ WIV64         | Jesús Sanz del Rey              | [Jesús Sanz del Rey](mailto:
 RV6           | Nikola Lukić                    | [Nikola Lukić](mailto:lukicn@protonmail.com)                | 39               | https://github.com/kiclu/rv6
 ApogeoRV      | Gabriele Tripi                  | [Gabriele Tripi](mailto:tripi.gabriele2002@gmail.com)       | 40               | https://github.com/GabbedT/ApogeoRV
 MicroRV32      | AGRA, Group of Computer Architecture, University of Bremen | [RISC-V @ AGRA](mailto:riscv@informatik.uni-bremen.de)       | 41               | https://github.com/agra-uni-bremen/microrv32
+Coreblocks    | Kuźnia Rdzeni, University of Wrocław | [Coreblocks Team](mailto:coreblocks@cs.uni.wroc.pl)    | 42               | https://github.com/kuznia-rdzeni/coreblocks

tilk commented 7 months ago

@piotro888 Approved.