Fix instruction cache refilling bug

[xThaid]

While working on the superscalar frontend, I found a bug when occurred when refilling a cache line.

Exact way to reproduce it:

• Issue two requests to the cache line. The first one should make a hit, the second one should cause an error when refilling.
• Wait some time before accepting any result
• Accept the first response
• Wait some time again
• Accept the second response
• Now the next request will return a response with an error bit set (even when there was a cache hit)

I added a test for this case I also (hopefully) simplified the flow in the instruction cache.