kuznia-rdzeni / coreblocks

RISC-V out-of-order core for education and research purposes
https://kuznia-rdzeni.github.io/coreblocks/
BSD 3-Clause "New" or "Revised" License
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Branch Prediction Checker #685

Closed xThaid closed 2 months ago

xThaid commented 2 months ago

As part of my ongoing work on the branch prediction, I wrote a prediction checker. This will be checking if the prediction is sane and if it is not, it will redirect the fetch unit and report the problem to the branch predictor.

For now, there is no branch prediction, so the core should work the same (no performance impact).

It seems that the doc build job failed because of the circular imports. In that case, we need #682 first.

github-actions[bot] commented 2 months ago

Benchmarks summary

Performance benchmarks

aha-mont64 crc32 minver nettle-sha256 nsichneu slre statemate ud
0.407 (0.000) 0.527 (0.000) 0.321 (0.000) 0.652 (0.000) 0.345 (0.000) 0.283 (0.000) 0.317 (0.000) 0.405 (0.000)

You can view all the metrics here.

Synthesis benchmarks (basic)

Device utilisation: (ECP5) LUTs used as DFF: (ECP5) LUTs used as carry: (ECP5) LUTs used as ram: (ECP5) Max clock frequency (Fmax)
▲ 22235 (+546) 5560 (0) ▼ 770 (-32) 1004 (0) ▼ 50 (-1)

Synthesis benchmarks (full)

Device utilisation: (ECP5) LUTs used as DFF: (ECP5) LUTs used as carry: (ECP5) LUTs used as ram: (ECP5) Max clock frequency (Fmax)
▲ 31920 (+717) 8802 (0) ▼ 1964 (-6) 1184 (0) ▼ 41 (-2)