Closed kv-be closed 5 months ago
report "FIFO width is limited" & " to 16 bits." severity FAILURE;
report "Error while generating bandwidth error: expected " & integer'image(dv_write_cycle_cnt - C_CARDINAL1280_BW_ERROR_PIPELINE_DELAY 32 C_DDR_PIXEL_SIZE_BIT) & " , got " & integer'image(C_AXI_WR_FIFO_DEPTH * C_AXI_DATA_WIDTH)
solved
report "FIFO width is limited" & " to 16 bits." severity FAILURE;
report "Error while generating bandwidth error: expected " & integer'image(dv_write_cycle_cnt - C_CARDINAL1280_BW_ERROR_PIPELINE_DELAY 32 C_DDR_PIXEL_SIZE_BIT) & " , got " & integer'image(C_AXI_WR_FIFO_DEPTH * C_AXI_DATA_WIDTH)