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kv-be / pretty-vhdl

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signal assignments not always correct #43

Closed kv-be closed 3 months ago

kv-be commented 4 months ago

if (a <= b) then req_dmarx_psize_B(0) <= (null_vector(31 downto G_DMA_SIZE_BIT_LENGTH) & req_dmarx_psize ) & null_vector(G_PCIE_ALIGNMENT - 1 downto 0); end if; req_dmarx_lsize_B <= (null_vector(31 downto G_DMA_SIZE_BIT_LENGTH) & req_dmarx_lsize & null_vector(G_PCIE_ALIGNMENT - 1 downto 0) );

kv-be commented 3 months ago

solved