Closed kv-be closed 3 months ago
P_checker : process ( CLK) variable v_t_exp_calib : unsigned(47 downto 0); variable v_t_exp_stop : unsigned(47 downto 0); variable v_t_exp_exp : unsigned(47 downto 0); variable v_int_delay : unsigned(47 downto 0); begin fkdsf <= fjkds; end process;
P_checker : process (CLK, rst ) variable v_t_exp_calib : unsigned(47 downto 0); variable v_t_exp_stop : unsigned(47 downto 0); variable v_t_exp_exp : unsigned(47 downto 0); variable v_int_delay : unsigned(47 downto 0); begin fkdsf <= fjkds; end process;
solved
P_checker : process (CLK, dksfjl) variable v_t_exp_calib : unsigned(47 downto 0); variable v_t_exp_stop : unsigned(47 downto 0); variable v_t_exp_exp : unsigned(47 downto 0); variable v_int_delay : unsigned(47 downto 0); begin end process;
P_checker : process (CLK) variable v_t_exp_calib : unsigned(47 downto 0); variable v_t_exp_stop : unsigned(47 downto 0); variable v_t_exp_exp : unsigned(47 downto 0); variable v_int_delay : unsigned(47 downto 0); begin end process;