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kv-be / pretty-vhdl

MIT License
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with select bad #9

Closed kv-be closed 6 months ago

kv-be commented 6 months ago

with sensor_gain select int_delay <= int_delay_hg_cds when C_CARDINAL_HG_CDS; int_delay_mg_itr when C_CARDINAL_MG_ITR; int_delay_mg_iwr when C_CARDINAL_MG_IWR;

kv-be commented 6 months ago

code above contained a VHDL error: the lines shall not end in a ; but a , When that is the case, pretty vhdl aligns correctly.