I'm trying to accomodate a Red Pitaya microprocessor, which strongly favors ethernet communication, into the existing labrad infrastructure of the lab. I saw your fpga board server (ghz_fpga_server.py), that seems to have labrad managing a direct ethernet server. I also notice your inactive DirectEthernet server. Do you have any general pointers/recommendations you can give on labrad-ethernet communication?
Hi there,
I'm trying to accomodate a Red Pitaya microprocessor, which strongly favors ethernet communication, into the existing labrad infrastructure of the lab. I saw your fpga board server (ghz_fpga_server.py), that seems to have labrad managing a direct ethernet server. I also notice your inactive DirectEthernet server. Do you have any general pointers/recommendations you can give on labrad-ethernet communication?
thanks in advance