In the FPGA server, there are calls to the figure out the sequence time from the memory sequence. This no longer applies for the jump table boards. I think the sequence time is needed for figuring out what the timeout should be (?). For the JT boards we can't know the sequence time even in principle (I guess the JT's aren't Turing complete but we've got a halting problem nonetheless).
In the FPGA server, there are calls to the figure out the sequence time from the memory sequence. This no longer applies for the jump table boards. I think the sequence time is needed for figuring out what the timeout should be (?). For the JT boards we can't know the sequence time even in principle (I guess the JT's aren't Turing complete but we've got a halting problem nonetheless).
Thoughts on this?