laforest / Octavo

Verilog FPGA Parts Library. Old Octavo soft-CPU project.
http://fpgacpu.ca/
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Use Anull to implement power saving. #48

Closed laforest closed 5 years ago

laforest commented 10 years ago

Since we can propagate Annul down the Datapath to disable A/B reads, ALU register latching, and A/B write, we might save power there. It should decrease in proportion to the number of "idle" threads looping on a no-op or waiting on I/O