separate config file for supported ic's

[eduard-x]

Not to configure hard coded in PonyProg the information about IC's, but instead this to load the information from xml file. Xml file is easier to edit with syntax highlighting (supported in mostly editors), then json. Example:

<?xml version="1.0" encoding="UTF-8"?>
<config type="PonyProg" version="3">
  <chip list="AT90CAN32,AT90CAN64,AT90CAN128">
    <!-- offset information (boot) needs for BOOTSZ group, see 'Boot start address' -->
    <ic name="AT90CAN32" code_sz="32k" data_sz="1k" wpgsz="128" adrsz="" boot="$3000"/>
    <ic name="AT90CAN64" code_sz="64k" data_sz="2k" wpgsz="256" adrsz="" boot="$7000"/>
    <ic name="AT90CAN128" code_sz="128k" data_sz="4k" wpgsz="256" adrsz="" boot="$F000"/>
    <fuse>
      <bit offset="0" group="CKSEL" idx="0" />
      <bit offset="1" group="CKSEL" idx="1" />
      <bit offset="2" group="CKSEL" idx="2" />
      <bit offset="3" group="CKSEL" idx="3" />
      <bit offset="4" group="SUT" idx="0" />
      <bit offset="5" group="SUT" idx="1" />
      <bit offset="6" name="CKOUT" help="Clock output on PORTC7" />
      <bit offset="7" name="CKDIV8" help="Divide clock by 8 internally" />
      <!-- byte high -->
      <bit offset="8" name="BOOTRST" help="Boot Reset vector Enabled (default address=$0000)" />
      <bit offset="9" group="BOOTSZ" idx="0" />
      <bit offset="10" group="BOOTSZ" idx="1" />
      <bit offset="11" name="EESAVE" help="Preserve EEPROM memory through the Chip Erase cycle" />
      <bit offset="12" name="WDTON" help="Watchdog timer always on" />
      <bit offset="13" name="SPIEN" help="Serial program downloading (SPI) enabled" />
      <bit offset="14" name="JTAGEN" help="JTAG Interface Enabled" />
      <bit offset="15" name="OCDEN" help="On-Chip Debug Enabled" />
      <!-- byte ext -->
      <bit offset="16" name="TA0SEL" help="Reserved for factory tests" />
      <bit offset="17" group="BODLEVEL" idx="0" />
      <bit offset="18" group="BODLEVEL" idx="1" />
      <bit offset="19" group="BODLEVEL" idx="2" />

      <!-- sets description -->
      <set code="CKSEL=0000 SUT=00" help="Ext. Clock; Start-up time: 6 CK + 0 ms" />
      ...
      <!-- Boot start address will be added to chip offset -->
      <!--chip="AT90CAN32: $3C00, AT90CAN64: $7C00, AT90CAN128: $FC00" -->
      <set code="BOOTSZ=10" help="Boot Flash section size=1024 words Boot start address=$nC00" />
      <!--chip="AT90CAN32: $3800, AT90CAN64: $7800, AT90CAN128: $F800" -->
      <set code="BOOTSZ=01" help="Boot Flash section size=2048 words Boot start address=$n800" /> 
      <!--chip="AT90CAN32: $3000, AT90CAN64: $7000, AT90CAN128: $F000" -->
      <set code="BOOTSZ=00" help="Boot Flash section size=4096 words Boot start address=$n000" />
      <!--chip="AT90CAN32: $3E00, AT90CAN64: $7E00, AT90CAN128: $FE00" -->
      <set code="BOOTSZ=11" help="Boot Flash section size=512 words Boot start address=$nE00" /> 

      <set code="BODLEVEL=111" help="Brown-out detection disabled" />
      <set code="BODLEVEL=000" help="Brown-out detection level at VCC=2.5 V" />
      <set code="BODLEVEL=001" help="Brown-out detection level at VCC=2.6 V" />
      <set code="BODLEVEL=010" help="Brown-out detection level at VCC=2.7 V" />
      <set code="BODLEVEL=011" help="Brown-out detection level at VCC=3.8 V" />
      <set code="BODLEVEL=100" help="Brown-out detection level at VCC=3.9 V" />
      <set code="BODLEVEL=101" help="Brown-out detection level at VCC=4.0 V" />
      <set code="BODLEVEL=110" help="Brown-out detection level at VCC=4.1 V" />
    </fuse>
    <lock>
      <bit offset="0" group="Lock" idx="0" />
      <bit offset="1" group="Lock" idx="1" />
      <bit offset="2" group="BootLock" idx="0" />
      <bit offset="3" group="BootLock" idx="1" />
      <bit offset="4" group="BootLoad" idx="0" />
      <bit offset="5" group="BootLoad" idx="1" />

      <!-- sets description -->
      <set code="Lock=11" help="Mode 1: No memory lock features enabled" />
      <set code="Lock=10" help="Mode 2: Further programming disabled" />
      <set code="Lock=00" help="Mode 3: Further programming and verification disabled" />
      ...
      <set code="BootLoad=01" help="Boot Loader Protection Mode 4: LPM prohibited in Boot Loader Section" />
    </lock>
  </chip>
  <chip names="the next">
    ...
  </chip>
</config>

After version with implemented UART interface i can implement the new parser for PonyProg. Possible, flex/bison based. Possible to use the Qt xml parser.

[eduard-x]

the complete example file is in branch wip/xml-patches all configurations are converted from fusemdlg.cpp and eeptypes.cpp files

[eduard-x]

Hi! I'm on implementing of separate config files. Which format should be implemented, what do you mean, xml or json is better?

There are two files of PIC configurations. JSON is bigger, but clearer. In files you can see the information for chip and help information for FUSE/LOCK popup window.

pic.xml.zip pic.json.zip

[eduard-x]

Hi! We can begin to test the sources in branch wip/v3.2-testing The parser is for xml because of QtXml. :) The defines.h will be generated automatically from xml files. The xml files for atmega and other configurations we can extend/add with new devices after testing. Best regards, Eduard

[eduard-x]

I can try to implement additional information about fuse/lock as additional attributes of nodes <ic ... />: fuse_mask="" lock_maks="" read_lock_cmd="" write_lock_cmd="" read_fuse_cmd="" write_fuse_cmd="" After this it's possible to overwite functions like WriteLockBits(), ReadLockBits()... and configure this part only in xml files too.

[eduard-x]

does someone have time to test for errors please? I have to implement the lock / fuse xml configuration in this version, but after testing of current commits