Previously, immediate shifts were handled by only making RSHFA have an immediate option controlled by bit 5. This way, the immediate field could go from 0 to 31 without issue, at the expense of robbing immediate options from LSHF and RSHFL.
Now, we've decided to make all shifts have an immediate variant. Bit 5 will control whether the immediate is used, and the last three bits are treated as the unsigned amount to shift by. The amount is incremented by one in hardware.
The encoding is shown in the table below. There, <<(A,D) denotes the shift corresponding to the bits A and D. So, <<(0,0) would be a left shift, while <<(1,1) would be an arithmetic right shift. Additionally sext(f,i)(x) denotes sign-extended the least significant i bits of x to a final bit width of f.
+------+----+-----+---+---+---+-----+
SHF+ | 1101 | DR | SR1 | 0 | A | D | SR2 |
+------+----+-----+---+---+---+-----+
DR <= SR1 <<(A,D) sext(5,32)(SR2)
===
+------+----+-----+---+---+---+---------+
SHF+ | 1101 | DR | SR1 | 1 | A | D | amount3 |
+------+----+-----+---+---+---+---------+
DR <= SR1 <<(A,D) (sext(5,3)(amount3) + 1)
Previously, immediate shifts were handled by only making
RSHFAhave an immediate option controlled by bit5. This way, the immediate field could go from0to31without issue, at the expense of robbing immediate options fromLSHFandRSHFL.Now, we've decided to make all shifts have an immediate variant. Bit
5will control whether the immediate is used, and the last three bits are treated as the unsigned amount to shift by. The amount is incremented by one in hardware.The encoding is shown in the table below. There,
<<(A,D)denotes the shift corresponding to the bitsAandD. So,<<(0,0)would be a left shift, while<<(1,1)would be an arithmetic right shift. Additionallysext(f,i)(x)denotes sign-extended the least significantibits ofxto a final bit width off.For example: