Open denizzzka opened 2 weeks ago
In RISC-V ABI aN
registers are dedicated for arguments
a0 0x3fc98dac a1 0x3fc98d8c a2 0x000000ff
ldc2 passes test
value by placing its address into a1
, but gcc code awaits whole struct value placed into a1
As I understand ABI, such structures (size less than XLEN) should be passed through the register
Only the CI-tested x86[_64] and AArch64 ABIs are working (i.e., compatible with C, and DMD's custom x86 ABI); there's a 64-bit RISC-V implementation in https://github.com/ldc-developers/ldc/blob/master/gen/abi/riscv64.cpp, but I have no idea about its quality. The C[++] interop tests coverage in the DMD testsuite is pretty good, but needs cross-compiling and running them on actual hardware or in an emulator.
(I don't know how to provide a demo. Do we have some kind of test environment for riscv32? Any ideas?)
ldc2 compiler flags is used:
Code:
ldc2 versions: 1.40.0-beta2 and 1.39.0