VCS compilation failure doesn't seem to be reported

leonardt / fault

A Python package for testing hardware (part of the magma ecosystem)

BSD 3-Clause "New" or "Revised" License

41 stars 13 forks source link

Closed hofstee closed 5 years ago

hofstee commented 5 years ago

I'm running tester.compile(...) but if I look at the modification time of the simv generated with the VCS backend it's not being modified.

hofstee commented 5 years ago

Ok, it looks like VCS compilation actually is failing but fault doesn't report any errors.

leonardt commented 5 years ago

Can you provide a way to reproduce the issue?

hofstee commented 5 years ago

I think this might be related to tester.compile not being implemented for the SystemVerilog target mentioned in the other issue?