Fortunately, this gives us a good reason to support compiling these to pono (next gen CoSA, CC @makaimann) to test this feature in the open source environment.
There's still some work to organize the property code (e.g. class hierarchy and reuse for the infix operator logic, as well as the compiler logic) but this was just a first stab at showing that it's possible. I started by defining a compile method on the property subtypes, but I found passing around the format_kwargs dictionary annoying, so I think it makes more sense to define a Compiler visitor (ala ast NodeTransformer pattern) so the compile code will live inside a separate class rather than with the properties.
Initial prototype of https://github.com/leonardt/fault/issues/240
Seems like we should be able to pull this off. Will also add an example of the sva syntax.
For now we just compile to inline_verilog, eventually we should add corresponding coreir primitives and compile to that representation.
Unforuntately, verilator does not support the concurrent assertion syntax (at least the ## operator was causing an error. (also see https://www.veripool.org/projects/verilator/wiki/Manual-verilator#Assertions).
Fortunately, this gives us a good reason to support compiling these to pono (next gen CoSA, CC @makaimann) to test this feature in the open source environment.
There's still some work to organize the property code (e.g. class hierarchy and reuse for the infix operator logic, as well as the compiler logic) but this was just a first stab at showing that it's possible. I started by defining a compile method on the property subtypes, but I found passing around the format_kwargs dictionary annoying, so I think it makes more sense to define a Compiler visitor (ala ast NodeTransformer pattern) so the compile code will live inside a separate class rather than with the properties.