Add API to just generate TB file

[leonardt]

Feature request from @kavyasreedhar to just generate a test bench (without running it)

[rsetaluri]

For system verilog target we have: https://github.com/leonardt/fault/blob/b634f16d145d6b2113e51e0d68b643e558c8b0f1/fault/system_verilog_target.py#L147-L148. Perhaps we could make them the same interface. Fine with skip_run flag or calling generate_test_bench() after compile(). If we can unify the interfaces then it would be great.

[leonardt]

Hmm, I think part of the confusion was that compile didn't actually produce the test bench (I think this is because the verilator code path uses it to compile the verilator model (which can be reused across multiple test bench drivers), while run generates the test bench file. compile_and_run with the skip_run flag was a hook to get the test bench without running it, but it's bit weird because the test bench is actually generate inside therun method. I think separating it into a different function makes the most sense for clarity, so we separate the compile, test bench generation, and run phases explicitly (we can keep the skip_run flag for backwards compatibility).

[leonardt]

Yea, in reviewing this code we may want to think of a better front-end API. I think we can keep around the existing methods for backwards compatibility, but it's not very extensible to do compile_and_run and then try to add another step (e.g. do we add compile_and_generate_test_bench_and_run. I think maybe we can devise a single front-end entry point method with options (then this avoids the user doing anything weird in between them). However, there's still the use case of "precompiling" (I guess we could have a skip_compile option to skip a stage, one annoyance is that we already have that option for skipping the magma compile)