Feature Request: Access internal verilog values from fault

leonardt / fault

A Python package for testing hardware (part of the magma ecosystem)

BSD 3-Clause "New" or "Revised" License

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Feature Request: Access internal verilog values from fault #47

Open rdaly525 opened 6 years ago

rdaly525 commented 6 years ago

It would be very nice to do something along the lines of:

mymod_v = m.DefineFromVerilogFile("mymod.v")[0]
tester = fault.Tester(mymod_v,mymod.clk)
print(v_tester.peek(mymod_v.internal.<mymod_internal_signal_name>))

Most verilog simulators support something like this.

rsetaluri commented 6 years ago

We've had some discussions about this and very much want to support this. I think there was some issue regarding verilator support of internal values though...