search

lfantoniosi / tn_vdp

Tang Nano 9K TMS 9118A VDP
BSD 3-Clause "New" or "Revised" License
120 stars 23 forks source link

tn_vdp_v3_v9958 aux pll config #10

Closed lintweaker closed 1 year ago

lintweaker commented 1 year ago

Hi, Thanks for v3 v9958! Possible issue with the docs regarding programming the Aux PLL The constraint file states:

IO_LOC "clk_50" 10; // crystal
IO_LOC "clk_125" 11; // crystal
IO_LOC "clk_63" 13; // crystal
The Tang 20k schematic shows: CLK0 - PIN10 CLK1 - PIN11 CLK2 - PIN13 So, the Aux PLL should be set via: pll_clk O0=50M pll_clk O1=125M pll_clk -s ` ? Thanks.

lfantoniosi commented 1 year ago

yeah you are right. updating the docs