Open ghost opened 7 years ago
ghost
commented
7 years ago On the ga-g41m-es2l, the hardware monitor chip cannot be accessed safely. Running sudo modprobe it87 will hard lock up the system after ~10 seconds. During these 10 seconds, all sensor output is shown and seems to be correct.
On the ga-945gcm-s2l, on the other hand, loading the it87 module does nothing. No sensor output is shown, but the board also doesn't crash.
ArthurHeymans
commented
7 years ago Hooked up the common ite Environment-Controller driver to it8718f: https://review.coreboot.org/#/c/17581/ What should now be done is to find a nice configuration for it and put that in devicetree.
zamaudio
commented
7 years ago Nice, does it work on both boards? Let's get this upstreamed!
ghost
commented
7 years ago Tested on ga-945gcm-s2l. Working for the most part.
lm-sensors now outputs it8718-isa-0290 values that look sane to me.
I do get this: it87 it87.656: Detected broken BIOS defaults, disabling PWM interface
Fan speed still seems static around 900RPM, regardless of system load.
ArthurHeymans
commented
7 years ago What left to be done is configuring the fan<->sensors and setting it to smart-magic-auto-orsomethinglikethat (modes have funky names on ite EC) and treshholds. It is also possible to hook up a CPU sensors to SIO using PECI, which is probably desired.
zamaudio
commented
7 years ago Here's a decompiled g41m-es2l superiotool dump for vendor bios EC region, will provide the blobtool spec file on wiki:
# AUTOGENERATED SETTER BY BLOBTOOL
{
"conf00_start" = 0x1,
"conf00_smien" = 0x1,
"conf00_irqen" = 0x0,
"conf00_irqclr" = 0x0,
"conf00_ro_one" = 0x1,
"conf00_copen" = 0x0,
"conf00_vbat" = 0x0,
"conf00_initreset" = 0x0,
"irq1_maxfantac1" = 0x0,
"irq1_maxfantac2" = 0x0,
"irq1_maxfantac3" = 0x0,
"irq1_maxfantac4" = 0x0,
"irq1_copen" = 0x1,
"irq1_reserved0" = 0x0,
"irq1_maxfantac5" = 0x0,
"irq1_reserved1" = 0x0,
"irq2_limit_vin0" = 0x0,
"irq2_limit_vin1" = 0x0,
"irq2_limit_vin2" = 0x0,
"irq2_limit_vin3" = 0x0,
"irq2_limit_vin4" = 0x0,
"irq2_limit_vin5" = 0x0,
"irq2_limit_vin6" = 0x0,
"irq2_limit_vin7" = 0x0,
"irq3_limit_temp1" = 0x0,
"irq3_limit_temp2" = 0x0,
"irq3_limit_temp3" = 0x0,
"irq3_reserved" = 0x0,
"smi1_dis_fantac1" = 0x1,
"smi1_dis_fantac2" = 0x1,
"smi1_dis_fantac3" = 0x1,
"smi1_dis_fantac4" = 0x1,
"smi1_dis_copen" = 0x1,
"smi1_reserved0" = 0x1,
"smi1_dis_fantac5" = 0x1,
"smi1_reserved1" = 0x1,
"smi2_dis_vin0" = 0x1,
"smi2_dis_vin1" = 0x1,
"smi2_dis_vin2" = 0x1,
"smi2_dis_vin3" = 0x1,
"smi2_dis_vin4" = 0x0,
"smi2_dis_vin5" = 0x1,
"smi2_dis_vin6" = 0x1,
"smi2_dis_vin7" = 0x1,
"smi3_dis_temp1" = 0x0,
"smi3_dis_temp2" = 0x0,
"smi3_dis_temp3" = 0x0,
"smi3_reserved" = 0x0,
"irqmask1_fantac1" = 0x1,
"irqmask1_fantac2" = 0x1,
"irqmask1_fantac3" = 0x1,
"irqmask1_fantac4" = 0x0,
"irqmask1_copen" = 0x1,
"irqmask1_reserved0" = 0x1,
"irqmask1_fantac5" = 0x0,
"irqmask1_reserved1" = 0x0,
"irqmask2_vin0" = 0x1,
"irqmask2_vin1" = 0x1,
"irqmask2_vin2" = 0x1,
"irqmask2_vin3" = 0x1,
"irqmask2_vin4" = 0x1,
"irqmask2_vin5" = 0x1,
"irqmask2_vin6" = 0x1,
"irqmask2_vin7" = 0x1,
"irqmask3_temp1" = 0x1,
"irqmask3_temp2" = 0x1,
"irqmask3_temp3" = 0x1,
"irqmask3_reserved" = 0x0,
"irqmask3_extsensor" = 0x1,
"iface_reserved" = 0x4,
"iface_extsensor_select" = 0x5,
"iface_pseudo_eoc" = 0x0,
"fanpwm_reserved" = 0x9,
"fanpwm_smoothing_step" = 0x0,
"fantach16_en_tac1" = 0x1,
"fantach16_en_tac2" = 0x1,
"fantach16_en_tac3" = 0x1,
"fantach16_tmpin1_enh" = 0x0,
"fantach16_en_tac4" = 0x0,
"fantach16_en_tac5" = 0x0,
"fantach16_tmpin2_enh" = 0x0,
"fantach16_tmpin3_enh" = 0x0,
"fantach_lo_counts1" = 0x3e,
"fantach_lo_counts2" = 0xff,
"fantach_lo_counts3" = 0x0,
"fantach_lo_limit1" = 0xff,
"fantach_lo_limit2" = 0xff,
"fantach_lo_limit3" = 0xff,
"fanctlmain_mode1" = 0x0,
"fanctlmain_mode2" = 0x1,
"fanctlmain_mode3" = 0x1,
"fanctlmain_reserved0" = 0x0,
"fanctlmain_en_tac1" = 0x1,
"fanctlmain_en_tac2" = 0x1,
"fanctlmain_en_tac3" = 0x0,
"fanctlmain_reserved1" = 0x0,
"fanctl_enable1" = 0x1,
"fanctl_enable2" = 0x1,
"fanctl_enable3" = 0x1,
"fanctl_minduty_sel" = 0x0,
"fanctl_pwm_base_clock" = 0x5,
"fanctl_allpolarity" = 0x1,
"fanctl1_tmpin_sel" = 0x2,
"fanctl1_steps" = 0x1f,
"fanctl1_pwm_mode" = 0x1,
"fanctl2_tmpin_sel" = 0x3,
"fanctl2_steps" = 0x1f,
"fanctl2_pwm_mode" = 0x0,
"fanctl3_tmpin_sel" = 0x2,
"fanctl3_steps" = 0x10,
"fanctl3_pwm_mode" = 0x1,
"fantach_hi_counts1" = 0x2,
"fantach_hi_counts2" = 0xff,
"fantach_hi_counts3" = 0x0,
"fantach_hi_limit1" = 0xff,
"fantach_hi_limit2" = 0xff,
"fantach_hi_limit3" = 0xff,
"reserved1e" = 0x0,
"reserved1f" = 0x0,
"vin0" = 0x43,
"vin1" = 0x76,
"vin2" = 0xcb,
"vin3" = 0xb8,
"vin4" = 0x11,
"vin5" = 0x80,
"vin6" = 0x8b,
"vin7" = 0xc0,
"vbat" = 0xbb,
"tmpin1" = 0xc9,
"tmpin2" = 0xfe,
"tmpin3" = 0x12,
"reserved2c" = 0x0,
"reserved2d" = 0x0,
"reserved2e" = 0x0,
"reserved2f" = 0x0,
"limit_hi_vin0" = 0xff,
"limit_lo_vin0" = 0x0,
"limit_hi_vin1" = 0xff,
"limit_lo_vin1" = 0x0,
"limit_hi_vin2" = 0xff,
"limit_lo_vin2" = 0x0,
"limit_hi_vin3" = 0xff,
"limit_lo_vin3" = 0x0,
"limit_hi_vin4" = 0x83,
"limit_lo_vin4" = 0x0,
"limit_hi_vin5" = 0xff,
"limit_lo_vin5" = 0x0,
"limit_hi_vin6" = 0xff,
"limit_lo_vin6" = 0x0,
"limit_hi_vin7" = 0xff,
"limit_lo_vin7" = 0x0,
"limit_hi_tmpin1" = 0x7f,
"limit_lo_tmpin1" = 0x7f,
"limit_hi_tmpin2" = 0x7f,
"limit_lo_tmpin2" = 0x7f,
"limit_hi_tmpin3" = 0x7f,
"limit_lo_tmpin3" = 0x7f,
"reserved46" = 0x0,
"reserved47" = 0x0,
"reserved48" = 0x0,
"reserved49" = 0x0,
"reserved4a" = 0x0,
"reserved4b" = 0x0,
"reserved4c" = 0x0,
"reserved4d" = 0x0,
"reserved4e" = 0x0,
"reserved4f" = 0x0,
"adc_scan_enable_vin0" = 0x1,
"adc_scan_enable_vin1" = 0x1,
"adc_scan_enable_vin2" = 0x1,
"adc_scan_enable_vin3" = 0x1,
"adc_scan_enable_vin4" = 0x1,
"adc_scan_enable_vin5" = 0x0,
"adc_scan_enable_vin6" = 0x0,
"adc_scan_enable_vin7" = 0x1,
"therm_diode_tmpin1" = 0x0,
"therm_diode_tmpin2" = 0x0,
"therm_diode_tmpin3" = 0x1,
"therm_resistor_tmpin1" = 0x1,
"therm_resistor_tmpin2" = 0x1,
"therm_resistor_tmpin3" = 0x0,
"therm_reserved" = 0x0,
"therm_limit_tmpin1" = 0x7f,
"therm_limit_tmpin2" = 0x7f,
"therm_limit_tmpin3" = 0x7f,
"therm_resistor_vin4" = 0x0,
"therm_resistor_vin5" = 0x0,
"therm_resistor_vin6" = 0x0,
"adc_fanctl2_pwm_duty" = 0x0,
"adc_fanctl2_pwm_bclk" = 0x0,
"adc_tmpin3_ext_select" = 0x0,
"thermal_zero_diode1" = 0xf6,
"thermal_zero_diode2" = 0xf6,
"ite_vendor_id" = 0x90,
"thermal_zero_diode3" = 0xf6,
"reserved5a" = 0x0,
"ite_code_id" = 0x12,
"beep_fantac" = 0x0,
"beep_vin" = 0x0,
"beep_tmpin" = 0x0,
"beep_reserved" = 0x0,
"adc_clock_select" = 0x6,
"thermal_zero_adj_en" = 0x0,
"beep_fan_freq_div" = 0x0,
"beep_fan_tone_div" = 0x0,
"beep_volt_freq_div" = 0x0,
"beep_volt_tone_div" = 0x0,
"beep_temp_freq_div" = 0x0,
"beep_temp_tone_div" = 0x0,
"sguard1_temp_lim_off" = 0x0,
"sguard1_temp_lim_fan" = 0x14,
"reserved62" = 0x41,
"sguard1_pwm_start" = 0x23,
"sguard1_pwm_slope6" = 0x0,
"sguard1_pwm_slope05" = 0x10,
"sguard1_pwm_reserved" = 0x0,
"sguard1_fan_smooth_en" = 0x1,
"sguard1_temp_interval" = 0x3,
"sguard1_temp_reserved" = 0x0,
"sguard1_temp_pwm_lin" = 0x0,
"reserved66" = 0x0,
"reserved67" = 0x0,
"sguard2_temp_lim_off" = 0x7f,
"sguard2_temp_lim_fan" = 0x7f,
"reserved6a" = 0x7f,
"sguard2_pwm_start" = 0x0,
"sguard2_pwm_slope6" = 0x0,
"sguard2_pwm_slope05" = 0x0,
"sguard2_pwm_reserved" = 0x0,
"sguard2_fan_smooth_en" = 0x0,
"sguard2_temp_interval" = 0x1f,
"sguard2_temp_reserved" = 0x3,
"sguard2_temp_pwm_lin" = 0x0,
"reserved6e" = 0x0,
"reserved6f" = 0x0,
"sguard3_temp_lim_off" = 0x0,
"sguard3_temp_lim_fan" = 0x14,
"reserved72" = 0x41,
"sguard3_pwm_start" = 0x23,
"sguard3_pwm_slope6" = 0x0,
"sguard3_pwm_slope05" = 0x10,
"sguard3_pwm_reserved" = 0x0,
"sguard3_fan_smooth_en" = 0x1,
"sguard3_temp_interval" = 0x3,
"sguard3_temp_reserved" = 0x0,
"sguard3_temp_pwm_lin" = 0x0,
"reserved76" = 0x0,
"reserved77" = 0x0,
"reserved78" = 0x0,
"reserved79" = 0x0,
"reserved7a" = 0x0,
"reserved7b" = 0x0,
"reserved7c" = 0x0,
"reserved7d" = 0x0,
"reserved7e" = 0x0,
"reserved7f" = 0x0,
"fantach_lo_counts4" = 0x0,
"fantach_hi_counts4" = 0x0,
"fantach_lo_counts5" = 0x0,
"fantach_hi_counts5" = 0x0,
"fantach_lo_limit4" = 0x0,
"fantach_hi_limit4" = 0x0,
"fantach_lo_limit5" = 0x0,
"fantach_hi_limit5" = 0x0,
"ext_host_busy" = 0x0,
"ext_host_fnsh" = 0x0,
"ext_host_r_fcs_error" = 0x0,
"ext_host_w_fcs_error" = 0x0,
"ext_host_peci_highz" = 0x0,
"ext_host_sst_slave" = 0x0,
"ext_host_sst_bus" = 0x0,
"ext_host_data_fifo_clr" = 0x0,
"ext_host_target_addr" = 0x0,
"ext_host_write_length" = 0x0,
"ext_host_read_length" = 0x0,
"ext_host_cmd" = 0x0,
"ext_host_writedata" = 0x0,
"ext_hostctl_start" = 0x0,
"ext_hostctl_sst_amdsi" = 0x1,
"ext_hostctl_sst_ctl" = 0x0,
"ext_hostctl_resetfifo" = 0x0,
"ext_hostctl_fcs_abort" = 0x0,
"ext_hostctl_start_en" = 0x0,
"ext_hostctl_start_ctl" = 0x0,
"ext_host_readdata" = 0xc8,
"fan1_temp_limit_start" = 0xff,
"fan1_slope_pwm" = 0x0,
"fan1_temp_input_sel0" = 0x0,
"fan1_ctlmode_temp_ivl" = 0x0,
"fan1_ctlmode_target" = 0x0,
"fan1_temp_input_sel1" = 0x0,
"reserved93" = 0x0,
"fan2_temp_limit_start" = 0xff,
"fan2_slope_pwm" = 0x0,
"fan2_temp_input_sel0" = 0x0,
"fan2_ctlmode_temp_ivl" = 0x0,
"fan2_ctlmode_target" = 0x0,
"fan2_temp_input_sel1" = 0x0
}So I think the sensors should be configured as vendor bios. The rest like fan settings can be set to automatic where vendor bios sets them to manual. Example of a devicetree using common EC driver: https://review.coreboot.org/#/c/17446/1/src/mainboard/roda/rv11/variants/rw11/devicetree.cb
ghost
commented
7 years ago Tested on GA-G41M-ES2L. All issues are fixed.
sudo modprobe it87 no longer locks the system up, and shows sensor output.ArthurHeymans
commented
7 years ago Should be trivial to port to ga-945gcm-s2l.
ghost
commented
7 years ago Re-opening this, because it actually doesn't seem to work yet.
On both the ga-g41m-es2l and the ga-945gcm-s2l, sensor output works fine, but the fan still runs at a fixed speed. (And rather fast when idle.)
I did once test a ga-g41m-es2l-ectest.rom, in which fan control indeed worked well (and the fan ran slower when idle), but using coreboot master it's still broken on both boards.
zamaudio
commented
7 years ago Can you provide sha1 git hash of the coreboot version you tested? As in the one that you say failed. Please in future always provide git hash don't just say "it's broken on master".
ghost
commented
7 years ago 3eb3ef8a950da8bca42c8edbc2729aa43c066fe9
zamaudio
commented
7 years ago I can't find the above hash in coreboot... can you please give me a non-local hash.
ghost
commented
7 years ago I'm not that great with git, but I did a hard reset to origin/master:
kevin@vanadium:~/code/coreboot$ git reset --hard origin/master
HEAD is now at d1e2edf libpayload: Add Cougar Point PCH's AHCI to whitelistI compiled rom's from this code, and the fan speed was static on both boards.
Do I have to cherry-pick anything, or do I need something in .config enabled to make it work?
zamaudio
commented
7 years ago Very strange indeed, that hash includes the code required to make the SIO EC work...
ghost
commented
7 years ago Correct, because other related bugs are fixed. The ga-g41m-es2l no longer locks up because it thinks it's overheating when I run modprobe it87, and the ga-945gcm-s2l shows sensor output. Neither was the case before the SIO EC commits.
All other it8718f-related bugs are fixed for me, it's just the dynamic fan speed that doesn't work on any of my boards with any of my coolers. Except for one g41m rom @ArthurHeymans sent me once. There, it did work.
So if nothing has to be cherry picked, that leaves .config options.
I'm using this for the ga-g41m-es2l:
CONFIG_VENDOR_GIGABYTE=y
CONFIG_BOARD_GIGABYTE_GA_G41M_ES2L=y
CONFIG_CPU_MICROCODE_CBFS_NONE=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
CONFIG_USE_OPTION_TABLE=yAnd this for the ga-945gcm-s2l:
CONFIG_VENDOR_GIGABYTE=y
CONFIG_BOARD_GIGABYTE_GA_945GCM_S2L=y
CONFIG_CPU_MICROCODE_CBFS_NONE=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
CONFIG_USE_OPTION_TABLE=yThen I run make clean, make menuconfig, Exit, make.
mzcs
commented
5 years ago The Fan still runs at a Fixed speed, at least for 'Gigabyte GA-G41M-ES2L',
Making a High CPU Load a potentially risky venture... a one that might end-up with a fried CPU and/or Mainboard.
-
git hash of the coreboot version tested: bba18c5540
coreboot configuration:
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
CONFIG_ANY_TOOLCHAIN=y
CONFIG_USE_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_USE_BLOBS=y
CONFIG_RELOCATABLE_RAMSTAGE=y
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
CONFIG_VENDOR_GIGABYTE=y
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="gigabyte/ga-g41m-es2l"
CONFIG_MAINBOARD_PART_NUMBER="GA-G41M-ES2L"
CONFIG_MAX_CPUS=4
CONFIG_CBFS_SIZE=0x100000
CONFIG_UART_FOR_CONSOLE=0
CONFIG_PAYLOAD_CONFIGFILE="/root/dev/coreboot/.seabiosconfig"
CONFIG_MAINBOARD_VENDOR="GIGABYTE"
CONFIG_VGA_BIOS_ID="8086,2e32"
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
CONFIG_DIMM_SPD_SIZE=256
CONFIG_VGA_BIOS=y
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
CONFIG_VGA_BIOS_FILE="/root/dev/coreboot/vgabios_intel_elk_2085.rom"
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="GIGABYTE"
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_DCACHE_RAM_BASE=0xfeffc000
CONFIG_DCACHE_RAM_SIZE=0x4000
CONFIG_MAX_REBOOT_CNT=3
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_FMDFILE=""
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_POST_DEVICE=y
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_BOARD_GIGABYTE_GA_G41M_ES2L=y
CONFIG_DIMM_MAX=4
CONFIG_TTYS0_LCS=3
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GA-G41M-ES2L"
CONFIG_CPU_ADDR_BITS=36
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=6
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_DRIVERS_PS2_KEYBOARD=y
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
CONFIG_HEAP_SIZE=0x4000
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_BOARD_ROMSIZE_KB_1024=y
CONFIG_COREBOOT_ROMSIZE_KB_1024=y
CONFIG_COREBOOT_ROMSIZE_KB=1024
CONFIG_ROM_SIZE=0x100000
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
CONFIG_MAINBOARD_POWER_FAILURE_STATE=2
CONFIG_S3_VGA_ROM_RUN=y
CONFIG_EHCI_BAR=0xfef00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
CONFIG_ARCH_ARMV8_EXTENSION=0
CONFIG_STACK_SIZE=0x1000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_PCIEXP_CLK_PM=y
CONFIG_TTYS0_BASE=0x3f8
CONFIG_CONSOLE_CBMEM=y
CONFIG_UART_PCI_ADDR=0x0
CONFIG_INTEL_HAS_TOP_SWAP=y
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
CONFIG_XIP_ROM_SIZE=0x10000
CONFIG_NUM_IPI_STARTS=2
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_CPU_INTEL_MODEL_1067X=y
CONFIG_CPU_INTEL_MODEL_F3X=y
CONFIG_CPU_INTEL_MODEL_F4X=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_LGA775=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
CONFIG_PARALLEL_MP=y
CONFIG_UDELAY_LAPIC=y
CONFIG_LAPIC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_CACHE_AS_RAM=y
CONFIG_NO_CAR_GLOBAL_MIGRATION=y
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
CONFIG_CPU_UCODE_BINARIES="/root/dev/coreboot/cpu_microcode_blob.bin.new"
CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/x4x/bootblock.c"
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_X4X=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801gx/bootblock.c"
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y
CONFIG_SUPERIO_ITE_ENV_CTRL=y
CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y
CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y
CONFIG_SUPERIO_ITE_IT8718F=y
CONFIG_SEABIOS_PS2_TIMEOUT=0
CONFIG_UDK_2013_VERSION=2013
CONFIG_UDK_2015_VERSION=2015
CONFIG_UDK_2017_VERSION=2017
CONFIG_UDK_VERSION=2013
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_RAMBASE=0xe00000
CONFIG_RAMTOP=0x1000000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_ID_SECTION_OFFSET=0x80
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_VGA_ROM_RUN=y
CONFIG_ON_DEVICE_ROM_LOAD=y
CONFIG_PCI_OPTION_ROM_RUN_REALMODE=y
CONFIG_VGA_TEXT_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
CONFIG_CACHE_MRC_SETTINGS=y
CONFIG_REALTEK_8168_RESET=y
CONFIG_REALTEK_8168_MACADDRESS="6c:f0:49:44:86:00"
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DRIVERS_UART=y
CONFIG_HAVE_USBDEBUG=y
CONFIG_VPD=y
CONFIG_DRIVERS_GENERIC_WIFI=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_GFX_GMA_INTERNAL_IS_EDP=y
CONFIG_DRIVERS_MC146818=y
CONFIG_VGA=y
CONFIG_USER_NO_TPM=y
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_POSTCAR_CONSOLE=y
CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_SERIAL=y
CONFIG_CONSOLE_SERIAL_115200=y
CONFIG_TTYS0_BAUD=115200
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6=y
CONFIG_POST_DEVICE_PCI_PCIE=y
CONFIG_POST_IO_PORT=0x80
CONFIG_HWBASE_DEBUG_NULL=y
CONFIG_HAVE_ACPI_RESUME=y
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_MONOTONIC_TIMER=y
CONFIG_HAVE_OPTION_TABLE=y
CONFIG_IOAPIC=y
CONFIG_USE_WATCHDOG_ON_BOOT=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_COMMON_FADT=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_PAYLOAD_SEABIOS=y
CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
CONFIG_SEABIOS_MASTER=y
CONFIG_SEABIOS_BOOTORDER_FILE=""
CONFIG_SEABIOS_DEBUG_LEVEL=-1
CONFIG_PAYLOAD_OPTIONS=""
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_MASTER=y
CONFIG_HAVE_DEBUG_RAM_SETUP=y
CONFIG_HAVE_DEBUG_SMBUS=y
CONFIG_NO_EDID_FILL_FB=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_RELOCATABLE_MODULES=y
CONFIG_BOOTBLOCK_CUSTOM=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_POSTCAR=y
CONFIG_HAVE_RAMSTAGE=y'superiotool' util. - 'bincfg' util. w/ 'it8718f-ec.spec' parsed - output:
{
"conf00_start" = 0x1,
"conf00_smien" = 0x1,
"conf00_irqen" = 0x0,
"conf00_irqclr" = 0x0,
"conf00_ro_one" = 0x1,
"conf00_copen" = 0x1,
"conf00_vbat" = 0x1,
"conf00_initreset" = 0x0,
"irq1_maxfantac1" = 0x1,
"irq1_maxfantac2" = 0x0,
"irq1_maxfantac3" = 0x1,
"irq1_maxfantac4" = 0x0,
"irq1_copen" = 0x1,
"irq1_reserved0" = 0x1,
"irq1_maxfantac5" = 0x1,
"irq1_reserved1" = 0x0,
"irq2_limit_vin0" = 0x0,
"irq2_limit_vin1" = 0x0,
"irq2_limit_vin2" = 0x0,
"irq2_limit_vin3" = 0x0,
"irq2_limit_vin4" = 0x1,
"irq2_limit_vin5" = 0x1,
"irq2_limit_vin6" = 0x1,
"irq2_limit_vin7" = 0x0,
"irq3_limit_temp1" = 0x1,
"irq3_limit_temp2" = 0x0,
"irq3_limit_temp3" = 0x1,
"irq3_reserved" = 0xc,
"smi1_dis_fantac1" = 0x0,
"smi1_dis_fantac2" = 0x1,
"smi1_dis_fantac3" = 0x0,
"smi1_dis_fantac4" = 0x0,
"smi1_dis_copen" = 0x1,
"smi1_reserved0" = 0x1,
"smi1_dis_fantac5" = 0x1,
"smi1_reserved1" = 0x0,
"smi2_dis_vin0" = 0x1,
"smi2_dis_vin1" = 0x0,
"smi2_dis_vin2" = 0x0,
"smi2_dis_vin3" = 0x1,
"smi2_dis_vin4" = 0x0,
"smi2_dis_vin5" = 0x1,
"smi2_dis_vin6" = 0x1,
"smi2_dis_vin7" = 0x0,
"smi3_dis_temp1" = 0x1,
"smi3_dis_temp2" = 0x1,
"smi3_dis_temp3" = 0x1,
"smi3_reserved" = 0xd,
"irqmask1_fantac1" = 0x0,
"irqmask1_fantac2" = 0x0,
"irqmask1_fantac3" = 0x1,
"irqmask1_fantac4" = 0x0,
"irqmask1_copen" = 0x1,
"irqmask1_reserved0" = 0x1,
"irqmask1_fantac5" = 0x1,
"irqmask1_reserved1" = 0x0,
"irqmask2_vin0" = 0x1,
"irqmask2_vin1" = 0x1,
"irqmask2_vin2" = 0x1,
"irqmask2_vin3" = 0x1,
"irqmask2_vin4" = 0x0,
"irqmask2_vin5" = 0x1,
"irqmask2_vin6" = 0x1,
"irqmask2_vin7" = 0x0,
"irqmask3_temp1" = 0x1,
"irqmask3_temp2" = 0x1,
"irqmask3_temp3" = 0x1,
"irqmask3_reserved" = 0xd,
"irqmask3_extsensor" = 0x0,
"iface_reserved" = 0xc,
"iface_extsensor_select" = 0x6,
"iface_pseudo_eoc" = 0x0,
"fanpwm_reserved" = 0x20,
"fanpwm_smoothing_step" = 0x0,
"fantach16_en_tac1" = 0x0,
"fantach16_en_tac2" = 0x1,
"fantach16_en_tac3" = 0x0,
"fantach16_tmpin1_enh" = 0x0,
"fantach16_en_tac4" = 0x1,
"fantach16_en_tac5" = 0x1,
"fantach16_tmpin2_enh" = 0x1,
"fantach16_tmpin3_enh" = 0x0,
"fantach_lo_counts1" = 0x34,
"fantach_lo_counts2" = 0x2e,
"fantach_lo_counts3" = 0x31,
"fantach_lo_limit1" = 0x30,
"fantach_lo_limit2" = 0x2d,
"fantach_lo_limit3" = 0x31,
"fanctlmain_mode1" = 0x0,
"fanctlmain_mode2" = 0x0,
"fanctlmain_mode3" = 0x1,
"fanctlmain_reserved0" = 0x0,
"fanctlmain_en_tac1" = 0x1,
"fanctlmain_en_tac2" = 0x1,
"fanctlmain_en_tac3" = 0x0,
"fanctlmain_reserved1" = 0x0,
"fanctl_enable1" = 0x0,
"fanctl_enable2" = 0x0,
"fanctl_enable3" = 0x0,
"fanctl_minduty_sel" = 0x0,
"fanctl_pwm_base_clock" = 0x3,
"fanctl_allpolarity" = 0x0,
"fanctl1_tmpin_sel" = 0x1,
"fanctl1_steps" = 0xb,
"fanctl1_pwm_mode" = 0x0,
"fanctl2_tmpin_sel" = 0x3,
"fanctl2_steps" = 0x19,
"fanctl2_pwm_mode" = 0x0,
"fanctl3_tmpin_sel" = 0x2,
"fanctl3_steps" = 0x18,
"fanctl3_pwm_mode" = 0x0,
"fantach_hi_counts1" = 0x62,
"fantach_hi_counts2" = 0x61,
"fantach_hi_counts3" = 0x31,
"fantach_hi_limit1" = 0x38,
"fantach_hi_limit2" = 0x63,
"fantach_hi_limit3" = 0x35,
"reserved1e" = 0x35,
"reserved1f" = 0x34,
"vin0" = 0x30,
"vin1" = 0xa,
"vin2" = 0x46,
"vin3" = 0x6f,
"vin4" = 0x75,
"vin5" = 0x6e,
"vin6" = 0x64,
"vin7" = 0x20,
"vbat" = 0x49,
"tmpin1" = 0x54,
"tmpin2" = 0x45,
"tmpin3" = 0x20,
"reserved2c" = 0x49,
"reserved2d" = 0x54,
"reserved2e" = 0x38,
"reserved2f" = 0x37,
"limit_hi_vin0" = 0x31,
"limit_lo_vin0" = 0x38,
"limit_hi_vin1" = 0x46,
"limit_lo_vin1" = 0x20,
"limit_hi_vin2" = 0x28,
"limit_lo_vin2" = 0x69,
"limit_hi_vin3" = 0x64,
"limit_lo_vin3" = 0x3d,
"limit_hi_vin4" = 0x30,
"limit_lo_vin4" = 0x78,
"limit_hi_vin5" = 0x38,
"limit_lo_vin5" = 0x37,
"limit_hi_vin6" = 0x31,
"limit_lo_vin6" = 0x38,
"limit_hi_vin7" = 0x2c,
"limit_lo_vin7" = 0x20,
"limit_hi_tmpin1" = 0x72,
"limit_lo_tmpin1" = 0x65,
"limit_hi_tmpin2" = 0x76,
"limit_lo_tmpin2" = 0x3d,
"limit_hi_tmpin3" = 0x30,
"limit_lo_tmpin3" = 0x78,
"reserved46" = 0x38,
"reserved47" = 0x29,
"reserved48" = 0x20,
"reserved49" = 0x61,
"reserved4a" = 0x74,
"reserved4b" = 0x20,
"reserved4c" = 0x30,
"reserved4d" = 0x78,
"reserved4e" = 0x32,
"reserved4f" = 0x65,
"adc_scan_enable_vin0" = 0x0,
"adc_scan_enable_vin1" = 0x1,
"adc_scan_enable_vin2" = 0x0,
"adc_scan_enable_vin3" = 0x1,
"adc_scan_enable_vin4" = 0x0,
"adc_scan_enable_vin5" = 0x0,
"adc_scan_enable_vin6" = 0x0,
"adc_scan_enable_vin7" = 0x0,
"therm_diode_tmpin1" = 0x0,
"therm_diode_tmpin2" = 0x1,
"therm_diode_tmpin3" = 0x0,
"therm_resistor_tmpin1" = 0x0,
"therm_resistor_tmpin2" = 0x1,
"therm_resistor_tmpin3" = 0x0,
"therm_reserved" = 0x1,
"therm_limit_tmpin1" = 0x65,
"therm_limit_tmpin2" = 0x67,
"therm_limit_tmpin3" = 0x69,
"therm_resistor_vin4" = 0x1,
"therm_resistor_vin5" = 0x1,
"therm_resistor_vin6" = 0x0,
"adc_fanctl2_pwm_duty" = 0x0,
"adc_fanctl2_pwm_bclk" = 0x7,
"adc_tmpin3_ext_select" = 0x0,
"thermal_zero_diode1" = 0x74,
"thermal_zero_diode2" = 0x65,
"ite_vendor_id" = 0x72,
"thermal_zero_diode3" = 0x20,
"reserved5a" = 0x64,
"ite_code_id" = 0x75,
"beep_fantac" = 0x1,
"beep_vin" = 0x0,
"beep_tmpin" = 0x1,
"beep_reserved" = 0x1,
"adc_clock_select" = 0x6,
"thermal_zero_adj_en" = 0x0,
"beep_fan_freq_div" = 0x0,
"beep_fan_tone_div" = 0x7,
"beep_volt_freq_div" = 0xa,
"beep_volt_tone_div" = 0x3,
"beep_temp_freq_div" = 0xa,
"beep_temp_tone_div" = 0x0,
"sguard1_temp_lim_off" = 0x69,
"sguard1_temp_lim_fan" = 0x64,
"reserved62" = 0x78,
"sguard1_pwm_start" = 0x20,
"sguard1_pwm_slope6" = 0x0,
"sguard1_pwm_slope05" = 0x20,
"sguard1_pwm_reserved" = 0x0,
"sguard1_fan_smooth_en" = 0x0,
"sguard1_temp_interval" = 0x0,
"sguard1_temp_reserved" = 0x1,
"sguard1_temp_pwm_lin" = 0x0,
"reserved66" = 0x76,
"reserved67" = 0x61,
"sguard2_temp_lim_off" = 0x6c,
"sguard2_temp_lim_fan" = 0x20,
"reserved6a" = 0x20,
"sguard2_pwm_start" = 0x20,
"sguard2_pwm_slope6" = 0x0,
"sguard2_pwm_slope05" = 0x20,
"sguard2_pwm_reserved" = 0x0,
"sguard2_fan_smooth_en" = 0x0,
"sguard2_temp_interval" = 0x4,
"sguard2_temp_reserved" = 0x3,
"sguard2_temp_pwm_lin" = 0x0,
"reserved6e" = 0x65,
"reserved6f" = 0x66,
"sguard3_temp_lim_off" = 0xa,
"sguard3_temp_lim_fan" = 0x30,
"reserved72" = 0x78,
"sguard3_pwm_start" = 0x32,
"sguard3_pwm_slope6" = 0x0,
"sguard3_pwm_slope05" = 0x30,
"sguard3_pwm_reserved" = 0x0,
"sguard3_fan_smooth_en" = 0x0,
"sguard3_temp_interval" = 0x1a,
"sguard3_temp_reserved" = 0x1,
"sguard3_temp_pwm_lin" = 0x0,
"reserved76" = 0x20,
"reserved77" = 0x30,
"reserved78" = 0x78,
"reserved79" = 0x38,
"reserved7a" = 0x37,
"reserved7b" = 0x20,
"reserved7c" = 0x20,
"reserved7d" = 0x20,
"reserved7e" = 0x28,
"reserved7f" = 0x30,
"fantach_lo_counts4" = 0x78,
"fantach_hi_counts4" = 0x38,
"fantach_lo_counts5" = 0x37,
"fantach_hi_counts5" = 0x29,
"fantach_lo_limit4" = 0xa,
"fantach_hi_limit4" = 0x30,
"fantach_lo_limit5" = 0x78,
"fantach_hi_limit5" = 0x32,
"ext_host_busy" = 0x1,
"ext_host_fnsh" = 0x0,
"ext_host_r_fcs_error" = 0x0,
"ext_host_w_fcs_error" = 0x0,
"ext_host_peci_highz" = 0x1,
"ext_host_sst_slave" = 0x1,
"ext_host_sst_bus" = 0x0,
"ext_host_data_fifo_clr" = 0x0,
"ext_host_target_addr" = 0x3a,
"ext_host_write_length" = 0x20,
"ext_host_read_length" = 0x30,
"ext_host_cmd" = 0x78,
"ext_host_writedata" = 0x31,
"ext_hostctl_start" = 0x0,
"ext_hostctl_sst_amdsi" = 0x0,
"ext_hostctl_sst_ctl" = 0x0,
"ext_hostctl_resetfifo" = 0x1,
"ext_hostctl_fcs_abort" = 0x1,
"ext_hostctl_start_en" = 0x1,
"ext_hostctl_start_ctl" = 0x0,
"ext_host_readdata" = 0x20,
"fan1_temp_limit_start" = 0x20,
"fan1_slope_pwm" = 0x20,
"fan1_temp_input_sel0" = 0x0,
"fan1_ctlmode_temp_ivl" = 0x8,
"fan1_ctlmode_target" = 0x1,
"fan1_temp_input_sel1" = 0x0,
"reserved93" = 0x30,
"fan2_temp_limit_start" = 0x78,
"fan2_slope_pwm" = 0x31,
"fan2_temp_input_sel0" = 0x0,
"fan2_ctlmode_temp_ivl" = 0x18,
"fan2_ctlmode_target" = 0x1,
"fan2_temp_input_sel1" = 0x0
}'sensors' util. - sample output (CPU: Intel Xeon L5420, CPU Fan: Delta AUB0812H):
coretemp-isa-0000
Adapter: ISA adapter
Core 0: +52.0°C (high = +73.0°C, crit = +85.0°C)
Core 1: +47.0°C (high = +73.0°C, crit = +85.0°C)
Core 2: +49.0°C (high = +73.0°C, crit = +85.0°C)
Core 3: +49.0°C (high = +73.0°C, crit = +85.0°C)
it8718-isa-0290
Adapter: ISA adapter
in0: +1.07 V (min = +0.00 V, max = +4.08 V)
in1: +1.90 V (min = +0.00 V, max = +4.08 V)
in2: +3.36 V (min = +0.00 V, max = +4.08 V)
+5V: +2.93 V (min = +0.00 V, max = +4.08 V)
in4: +0.48 V (min = +0.00 V, max = +4.08 V)
in5: +4.08 V (min = +0.00 V, max = +4.08 V) ALARM
in6: +4.08 V (min = +0.00 V, max = +4.08 V) ALARM
in7: +3.17 V (min = +0.00 V, max = +4.08 V)
Vbat: +3.06 V
fan1: 2122 RPM (min = 0 RPM)
fan2: 1516 RPM (min = 0 RPM)
temp1: -55.0°C (low = +0.0°C, high = +127.0°C) sensor = thermistor
temp2: -2.0°C (low = +0.0°C, high = +127.0°C) sensor = thermistor
temp3: +45.0°C (low = +0.0°C, high = +127.0°C) sensor = thermal diode
cpu0_vid: +1.150 V
intrusion0: OKAlso, FWIW, I've found quite some Difference in the 'Vendor vs. Coreboot' (Vendor - as posted by @ghost) output of 'superiotool' util. (parsed) :
--- sio.vendor 2019-08-01 03:26:13.000000000 -0400
+++ sio.coreboot 2019-08-01 03:27:01.000000000 -0400
<...>
- "conf00_copen" = 0x0,
- "conf00_vbat" = 0x0,
+ "conf00_copen" = 0x1,
+ "conf00_vbat" = 0x1,
- "irq1_maxfantac1" = 0x0,
+ "irq1_maxfantac1" = 0x1,
- "irq1_maxfantac3" = 0x0,
+ "irq1_maxfantac3" = 0x1,
- "irq1_reserved0" = 0x0,
- "irq1_maxfantac5" = 0x0,
+ "irq1_reserved0" = 0x1,
+ "irq1_maxfantac5" = 0x1,
- "irq2_limit_vin4" = 0x0,
- "irq2_limit_vin5" = 0x0,
- "irq2_limit_vin6" = 0x0,
+ "irq2_limit_vin4" = 0x1,
+ "irq2_limit_vin5" = 0x1,
+ "irq2_limit_vin6" = 0x1,
- "irq3_limit_temp1" = 0x0,
+ "irq3_limit_temp1" = 0x1,
- "irq3_limit_temp3" = 0x0,
- "irq3_reserved" = 0x0,
- "smi1_dis_fantac1" = 0x1,
+ "irq3_limit_temp3" = 0x1,
+ "irq3_reserved" = 0xc,
+ "smi1_dis_fantac1" = 0x0,
- "smi1_dis_fantac3" = 0x1,
- "smi1_dis_fantac4" = 0x1,
+ "smi1_dis_fantac3" = 0x0,
+ "smi1_dis_fantac4" = 0x0,
- "smi1_reserved1" = 0x1,
+ "smi1_reserved1" = 0x0,
- "smi2_dis_vin1" = 0x1,
- "smi2_dis_vin2" = 0x1,
+ "smi2_dis_vin1" = 0x0,
+ "smi2_dis_vin2" = 0x0,
- "smi2_dis_vin7" = 0x1,
- "smi3_dis_temp1" = 0x0,
- "smi3_dis_temp2" = 0x0,
- "smi3_dis_temp3" = 0x0,
- "smi3_reserved" = 0x0,
- "irqmask1_fantac1" = 0x1,
- "irqmask1_fantac2" = 0x1,
+ "smi2_dis_vin7" = 0x0,
+ "smi3_dis_temp1" = 0x1,
+ "smi3_dis_temp2" = 0x1,
+ "smi3_dis_temp3" = 0x1,
+ "smi3_reserved" = 0xd,
+ "irqmask1_fantac1" = 0x0,
+ "irqmask1_fantac2" = 0x0,
- "irqmask1_fantac5" = 0x0,
+ "irqmask1_fantac5" = 0x1,
- "irqmask2_vin4" = 0x1,
+ "irqmask2_vin4" = 0x0,
- "irqmask2_vin7" = 0x1,
+ "irqmask2_vin7" = 0x0,
- "irqmask3_reserved" = 0x0,
- "irqmask3_extsensor" = 0x1,
- "iface_reserved" = 0x4,
- "iface_extsensor_select" = 0x5,
+ "irqmask3_reserved" = 0xd,
+ "irqmask3_extsensor" = 0x0,
+ "iface_reserved" = 0xc,
+ "iface_extsensor_select" = 0x6,
- "fanpwm_reserved" = 0x9,
+ "fanpwm_reserved" = 0x20,
- "fantach16_en_tac1" = 0x1,
+ "fantach16_en_tac1" = 0x0,
- "fantach16_en_tac3" = 0x1,
+ "fantach16_en_tac3" = 0x0,
- "fantach16_en_tac4" = 0x0,
- "fantach16_en_tac5" = 0x0,
- "fantach16_tmpin2_enh" = 0x0,
+ "fantach16_en_tac4" = 0x1,
+ "fantach16_en_tac5" = 0x1,
+ "fantach16_tmpin2_enh" = 0x1,
- "fantach_lo_counts1" = 0x3e,
- "fantach_lo_counts2" = 0xff,
- "fantach_lo_counts3" = 0x0,
- "fantach_lo_limit1" = 0xff,
- "fantach_lo_limit2" = 0xff,
- "fantach_lo_limit3" = 0xff,
+ "fantach_lo_counts1" = 0x34,
+ "fantach_lo_counts2" = 0x2e,
+ "fantach_lo_counts3" = 0x31,
+ "fantach_lo_limit1" = 0x30,
+ "fantach_lo_limit2" = 0x2d,
+ "fantach_lo_limit3" = 0x31,
- "fanctlmain_mode2" = 0x1,
+ "fanctlmain_mode2" = 0x0,
- "fanctl_enable1" = 0x1,
- "fanctl_enable2" = 0x1,
- "fanctl_enable3" = 0x1,
+ "fanctl_enable1" = 0x0,
+ "fanctl_enable2" = 0x0,
+ "fanctl_enable3" = 0x0,
- "fanctl_pwm_base_clock" = 0x5,
- "fanctl_allpolarity" = 0x1,
- "fanctl1_tmpin_sel" = 0x2,
- "fanctl1_steps" = 0x1f,
- "fanctl1_pwm_mode" = 0x1,
+ "fanctl_pwm_base_clock" = 0x3,
+ "fanctl_allpolarity" = 0x0,
+ "fanctl1_tmpin_sel" = 0x1,
+ "fanctl1_steps" = 0xb,
+ "fanctl1_pwm_mode" = 0x0,
- "fanctl2_steps" = 0x1f,
+ "fanctl2_steps" = 0x19,
- "fanctl3_steps" = 0x10,
- "fanctl3_pwm_mode" = 0x1,
- "fantach_hi_counts1" = 0x2,
- "fantach_hi_counts2" = 0xff,
- "fantach_hi_counts3" = 0x0,
- "fantach_hi_limit1" = 0xff,
- "fantach_hi_limit2" = 0xff,
- "fantach_hi_limit3" = 0xff,
- "reserved1e" = 0x0,
- "reserved1f" = 0x0,
- "vin0" = 0x43,
- "vin1" = 0x76,
- "vin2" = 0xcb,
- "vin3" = 0xb8,
- "vin4" = 0x11,
- "vin5" = 0x80,
- "vin6" = 0x8b,
- "vin7" = 0xc0,
- "vbat" = 0xbb,
- "tmpin1" = 0xc9,
- "tmpin2" = 0xfe,
- "tmpin3" = 0x12,
- "reserved2c" = 0x0,
- "reserved2d" = 0x0,
- "reserved2e" = 0x0,
- "reserved2f" = 0x0,
- "limit_hi_vin0" = 0xff,
- "limit_lo_vin0" = 0x0,
- "limit_hi_vin1" = 0xff,
- "limit_lo_vin1" = 0x0,
- "limit_hi_vin2" = 0xff,
- "limit_lo_vin2" = 0x0,
- "limit_hi_vin3" = 0xff,
- "limit_lo_vin3" = 0x0,
- "limit_hi_vin4" = 0x83,
- "limit_lo_vin4" = 0x0,
- "limit_hi_vin5" = 0xff,
- "limit_lo_vin5" = 0x0,
- "limit_hi_vin6" = 0xff,
- "limit_lo_vin6" = 0x0,
- "limit_hi_vin7" = 0xff,
- "limit_lo_vin7" = 0x0,
- "limit_hi_tmpin1" = 0x7f,
- "limit_lo_tmpin1" = 0x7f,
- "limit_hi_tmpin2" = 0x7f,
- "limit_lo_tmpin2" = 0x7f,
- "limit_hi_tmpin3" = 0x7f,
- "limit_lo_tmpin3" = 0x7f,
- "reserved46" = 0x0,
- "reserved47" = 0x0,
- "reserved48" = 0x0,
- "reserved49" = 0x0,
- "reserved4a" = 0x0,
- "reserved4b" = 0x0,
- "reserved4c" = 0x0,
- "reserved4d" = 0x0,
- "reserved4e" = 0x0,
- "reserved4f" = 0x0,
- "adc_scan_enable_vin0" = 0x1,
+ "fanctl3_steps" = 0x18,
+ "fanctl3_pwm_mode" = 0x0,
+ "fantach_hi_counts1" = 0x62,
+ "fantach_hi_counts2" = 0x61,
+ "fantach_hi_counts3" = 0x31,
+ "fantach_hi_limit1" = 0x38,
+ "fantach_hi_limit2" = 0x63,
+ "fantach_hi_limit3" = 0x35,
+ "reserved1e" = 0x35,
+ "reserved1f" = 0x34,
+ "vin0" = 0x30,
+ "vin1" = 0xa,
+ "vin2" = 0x46,
+ "vin3" = 0x6f,
+ "vin4" = 0x75,
+ "vin5" = 0x6e,
+ "vin6" = 0x64,
+ "vin7" = 0x20,
+ "vbat" = 0x49,
+ "tmpin1" = 0x54,
+ "tmpin2" = 0x45,
+ "tmpin3" = 0x20,
+ "reserved2c" = 0x49,
+ "reserved2d" = 0x54,
+ "reserved2e" = 0x38,
+ "reserved2f" = 0x37,
+ "limit_hi_vin0" = 0x31,
+ "limit_lo_vin0" = 0x38,
+ "limit_hi_vin1" = 0x46,
+ "limit_lo_vin1" = 0x20,
+ "limit_hi_vin2" = 0x28,
+ "limit_lo_vin2" = 0x69,
+ "limit_hi_vin3" = 0x64,
+ "limit_lo_vin3" = 0x3d,
+ "limit_hi_vin4" = 0x30,
+ "limit_lo_vin4" = 0x78,
+ "limit_hi_vin5" = 0x38,
+ "limit_lo_vin5" = 0x37,
+ "limit_hi_vin6" = 0x31,
+ "limit_lo_vin6" = 0x38,
+ "limit_hi_vin7" = 0x2c,
+ "limit_lo_vin7" = 0x20,
+ "limit_hi_tmpin1" = 0x72,
+ "limit_lo_tmpin1" = 0x65,
+ "limit_hi_tmpin2" = 0x76,
+ "limit_lo_tmpin2" = 0x3d,
+ "limit_hi_tmpin3" = 0x30,
+ "limit_lo_tmpin3" = 0x78,
+ "reserved46" = 0x38,
+ "reserved47" = 0x29,
+ "reserved48" = 0x20,
+ "reserved49" = 0x61,
+ "reserved4a" = 0x74,
+ "reserved4b" = 0x20,
+ "reserved4c" = 0x30,
+ "reserved4d" = 0x78,
+ "reserved4e" = 0x32,
+ "reserved4f" = 0x65,
+ "adc_scan_enable_vin0" = 0x0,
- "adc_scan_enable_vin2" = 0x1,
+ "adc_scan_enable_vin2" = 0x0,
- "adc_scan_enable_vin4" = 0x1,
+ "adc_scan_enable_vin4" = 0x0,
- "adc_scan_enable_vin7" = 0x1,
+ "adc_scan_enable_vin7" = 0x0,
- "therm_diode_tmpin2" = 0x0,
- "therm_diode_tmpin3" = 0x1,
- "therm_resistor_tmpin1" = 0x1,
+ "therm_diode_tmpin2" = 0x1,
+ "therm_diode_tmpin3" = 0x0,
+ "therm_resistor_tmpin1" = 0x0,
- "therm_reserved" = 0x0,
- "therm_limit_tmpin1" = 0x7f,
- "therm_limit_tmpin2" = 0x7f,
- "therm_limit_tmpin3" = 0x7f,
- "therm_resistor_vin4" = 0x0,
- "therm_resistor_vin5" = 0x0,
+ "therm_reserved" = 0x1,
+ "therm_limit_tmpin1" = 0x65,
+ "therm_limit_tmpin2" = 0x67,
+ "therm_limit_tmpin3" = 0x69,
+ "therm_resistor_vin4" = 0x1,
+ "therm_resistor_vin5" = 0x1,
- "adc_fanctl2_pwm_bclk" = 0x0,
+ "adc_fanctl2_pwm_bclk" = 0x7,
- "thermal_zero_diode1" = 0xf6,
- "thermal_zero_diode2" = 0xf6,
- "ite_vendor_id" = 0x90,
- "thermal_zero_diode3" = 0xf6,
- "reserved5a" = 0x0,
- "ite_code_id" = 0x12,
- "beep_fantac" = 0x0,
+ "thermal_zero_diode1" = 0x74,
+ "thermal_zero_diode2" = 0x65,
+ "ite_vendor_id" = 0x72,
+ "thermal_zero_diode3" = 0x20,
+ "reserved5a" = 0x64,
+ "ite_code_id" = 0x75,
+ "beep_fantac" = 0x1,
- "beep_tmpin" = 0x0,
- "beep_reserved" = 0x0,
+ "beep_tmpin" = 0x1,
+ "beep_reserved" = 0x1,
- "beep_fan_tone_div" = 0x0,
- "beep_volt_freq_div" = 0x0,
- "beep_volt_tone_div" = 0x0,
- "beep_temp_freq_div" = 0x0,
+ "beep_fan_tone_div" = 0x7,
+ "beep_volt_freq_div" = 0xa,
+ "beep_volt_tone_div" = 0x3,
+ "beep_temp_freq_div" = 0xa,
- "sguard1_temp_lim_off" = 0x0,
- "sguard1_temp_lim_fan" = 0x14,
- "reserved62" = 0x41,
- "sguard1_pwm_start" = 0x23,
+ "sguard1_temp_lim_off" = 0x69,
+ "sguard1_temp_lim_fan" = 0x64,
+ "reserved62" = 0x78,
+ "sguard1_pwm_start" = 0x20,
- "sguard1_pwm_slope05" = 0x10,
+ "sguard1_pwm_slope05" = 0x20,
- "sguard1_fan_smooth_en" = 0x1,
- "sguard1_temp_interval" = 0x3,
- "sguard1_temp_reserved" = 0x0,
+ "sguard1_fan_smooth_en" = 0x0,
+ "sguard1_temp_interval" = 0x0,
+ "sguard1_temp_reserved" = 0x1,
- "reserved66" = 0x0,
- "reserved67" = 0x0,
- "sguard2_temp_lim_off" = 0x7f,
- "sguard2_temp_lim_fan" = 0x7f,
- "reserved6a" = 0x7f,
- "sguard2_pwm_start" = 0x0,
+ "reserved66" = 0x76,
+ "reserved67" = 0x61,
+ "sguard2_temp_lim_off" = 0x6c,
+ "sguard2_temp_lim_fan" = 0x20,
+ "reserved6a" = 0x20,
+ "sguard2_pwm_start" = 0x20,
- "sguard2_pwm_slope05" = 0x0,
+ "sguard2_pwm_slope05" = 0x20,
- "sguard2_temp_interval" = 0x1f,
+ "sguard2_temp_interval" = 0x4,
- "reserved6e" = 0x0,
- "reserved6f" = 0x0,
- "sguard3_temp_lim_off" = 0x0,
- "sguard3_temp_lim_fan" = 0x14,
- "reserved72" = 0x41,
- "sguard3_pwm_start" = 0x23,
+ "reserved6e" = 0x65,
+ "reserved6f" = 0x66,
+ "sguard3_temp_lim_off" = 0xa,
+ "sguard3_temp_lim_fan" = 0x30,
+ "reserved72" = 0x78,
+ "sguard3_pwm_start" = 0x32,
- "sguard3_pwm_slope05" = 0x10,
+ "sguard3_pwm_slope05" = 0x30,
- "sguard3_fan_smooth_en" = 0x1,
- "sguard3_temp_interval" = 0x3,
- "sguard3_temp_reserved" = 0x0,
+ "sguard3_fan_smooth_en" = 0x0,
+ "sguard3_temp_interval" = 0x1a,
+ "sguard3_temp_reserved" = 0x1,
- "reserved76" = 0x0,
- "reserved77" = 0x0,
- "reserved78" = 0x0,
- "reserved79" = 0x0,
- "reserved7a" = 0x0,
- "reserved7b" = 0x0,
- "reserved7c" = 0x0,
- "reserved7d" = 0x0,
- "reserved7e" = 0x0,
- "reserved7f" = 0x0,
- "fantach_lo_counts4" = 0x0,
- "fantach_hi_counts4" = 0x0,
- "fantach_lo_counts5" = 0x0,
- "fantach_hi_counts5" = 0x0,
- "fantach_lo_limit4" = 0x0,
- "fantach_hi_limit4" = 0x0,
- "fantach_lo_limit5" = 0x0,
- "fantach_hi_limit5" = 0x0,
- "ext_host_busy" = 0x0,
+ "reserved76" = 0x20,
+ "reserved77" = 0x30,
+ "reserved78" = 0x78,
+ "reserved79" = 0x38,
+ "reserved7a" = 0x37,
+ "reserved7b" = 0x20,
+ "reserved7c" = 0x20,
+ "reserved7d" = 0x20,
+ "reserved7e" = 0x28,
+ "reserved7f" = 0x30,
+ "fantach_lo_counts4" = 0x78,
+ "fantach_hi_counts4" = 0x38,
+ "fantach_lo_counts5" = 0x37,
+ "fantach_hi_counts5" = 0x29,
+ "fantach_lo_limit4" = 0xa,
+ "fantach_hi_limit4" = 0x30,
+ "fantach_lo_limit5" = 0x78,
+ "fantach_hi_limit5" = 0x32,
+ "ext_host_busy" = 0x1,
- "ext_host_peci_highz" = 0x0,
- "ext_host_sst_slave" = 0x0,
+ "ext_host_peci_highz" = 0x1,
+ "ext_host_sst_slave" = 0x1,
- "ext_host_target_addr" = 0x0,
- "ext_host_write_length" = 0x0,
- "ext_host_read_length" = 0x0,
- "ext_host_cmd" = 0x0,
- "ext_host_writedata" = 0x0,
+ "ext_host_target_addr" = 0x3a,
+ "ext_host_write_length" = 0x20,
+ "ext_host_read_length" = 0x30,
+ "ext_host_cmd" = 0x78,
+ "ext_host_writedata" = 0x31,
- "ext_hostctl_sst_amdsi" = 0x1,
+ "ext_hostctl_sst_amdsi" = 0x0,
- "ext_hostctl_resetfifo" = 0x0,
- "ext_hostctl_fcs_abort" = 0x0,
- "ext_hostctl_start_en" = 0x0,
+ "ext_hostctl_resetfifo" = 0x1,
+ "ext_hostctl_fcs_abort" = 0x1,
+ "ext_hostctl_start_en" = 0x1,
- "ext_host_readdata" = 0xc8,
- "fan1_temp_limit_start" = 0xff,
- "fan1_slope_pwm" = 0x0,
+ "ext_host_readdata" = 0x20,
+ "fan1_temp_limit_start" = 0x20,
+ "fan1_slope_pwm" = 0x20,
- "fan1_ctlmode_temp_ivl" = 0x0,
- "fan1_ctlmode_target" = 0x0,
+ "fan1_ctlmode_temp_ivl" = 0x8,
+ "fan1_ctlmode_target" = 0x1,
- "reserved93" = 0x0,
- "fan2_temp_limit_start" = 0xff,
- "fan2_slope_pwm" = 0x0,
+ "reserved93" = 0x30,
+ "fan2_temp_limit_start" = 0x78,
+ "fan2_slope_pwm" = 0x31,
- "fan2_ctlmode_temp_ivl" = 0x0,
- "fan2_ctlmode_target" = 0x0,
+ "fan2_ctlmode_temp_ivl" = 0x18,
+ "fan2_ctlmode_target" = 0x1,@mzcs thanks for the report, can you please replace the above diff with the full vendor parsed file from a configuration where the fan is working correctly? Then I can try to compile it and flash to my board and maybe fix it.
mzcs
commented
5 years ago @zamaudio, Thank You For Your Willingness To Assist ! :)
& Here It Goes :
'superiotool' util. ( F/W = Vendor - F9; Fan Control = SMART_AUTOMATIC ) - 'bincfg' util. w/ 'it8718f-ec.spec' parsed - output:
{
"conf00_start" = 0x1,
"conf00_smien" = 0x1,
"conf00_irqen" = 0x0,
"conf00_irqclr" = 0x0,
"conf00_ro_one" = 0x1,
"conf00_copen" = 0x0,
"conf00_vbat" = 0x0,
"conf00_initreset" = 0x0,
"irq1_maxfantac1" = 0x0,
"irq1_maxfantac2" = 0x0,
"irq1_maxfantac3" = 0x0,
"irq1_maxfantac4" = 0x0,
"irq1_copen" = 0x0,
"irq1_reserved0" = 0x0,
"irq1_maxfantac5" = 0x0,
"irq1_reserved1" = 0x0,
"irq2_limit_vin0" = 0x0,
"irq2_limit_vin1" = 0x0,
"irq2_limit_vin2" = 0x0,
"irq2_limit_vin3" = 0x0,
"irq2_limit_vin4" = 0x0,
"irq2_limit_vin5" = 0x1,
"irq2_limit_vin6" = 0x1,
"irq2_limit_vin7" = 0x0,
"irq3_limit_temp1" = 0x0,
"irq3_limit_temp2" = 0x0,
"irq3_limit_temp3" = 0x0,
"irq3_reserved" = 0x0,
"smi1_dis_fantac1" = 0x1,
"smi1_dis_fantac2" = 0x1,
"smi1_dis_fantac3" = 0x1,
"smi1_dis_fantac4" = 0x1,
"smi1_dis_copen" = 0x1,
"smi1_reserved0" = 0x1,
"smi1_dis_fantac5" = 0x1,
"smi1_reserved1" = 0x1,
"smi2_dis_vin0" = 0x1,
"smi2_dis_vin1" = 0x1,
"smi2_dis_vin2" = 0x1,
"smi2_dis_vin3" = 0x1,
"smi2_dis_vin4" = 0x0,
"smi2_dis_vin5" = 0x1,
"smi2_dis_vin6" = 0x1,
"smi2_dis_vin7" = 0x1,
"smi3_dis_temp1" = 0x0,
"smi3_dis_temp2" = 0x0,
"smi3_dis_temp3" = 0x0,
"smi3_reserved" = 0x0,
"irqmask1_fantac1" = 0x1,
"irqmask1_fantac2" = 0x1,
"irqmask1_fantac3" = 0x1,
"irqmask1_fantac4" = 0x0,
"irqmask1_copen" = 0x1,
"irqmask1_reserved0" = 0x1,
"irqmask1_fantac5" = 0x0,
"irqmask1_reserved1" = 0x0,
"irqmask2_vin0" = 0x1,
"irqmask2_vin1" = 0x1,
"irqmask2_vin2" = 0x1,
"irqmask2_vin3" = 0x1,
"irqmask2_vin4" = 0x1,
"irqmask2_vin5" = 0x1,
"irqmask2_vin6" = 0x1,
"irqmask2_vin7" = 0x1,
"irqmask3_temp1" = 0x1,
"irqmask3_temp2" = 0x1,
"irqmask3_temp3" = 0x1,
"irqmask3_reserved" = 0x0,
"irqmask3_extsensor" = 0x1,
"iface_reserved" = 0x8,
"iface_extsensor_select" = 0x5,
"iface_pseudo_eoc" = 0x0,
"fanpwm_reserved" = 0x9,
"fanpwm_smoothing_step" = 0x0,
"fantach16_en_tac1" = 0x1,
"fantach16_en_tac2" = 0x1,
"fantach16_en_tac3" = 0x1,
"fantach16_tmpin1_enh" = 0x0,
"fantach16_en_tac4" = 0x0,
"fantach16_en_tac5" = 0x0,
"fantach16_tmpin2_enh" = 0x0,
"fantach16_tmpin3_enh" = 0x0,
"fantach_lo_counts1" = 0x4e,
"fantach_lo_counts2" = 0xbb,
"fantach_lo_counts3" = 0xff,
"fantach_lo_limit1" = 0xfe,
"fantach_lo_limit2" = 0xfe,
"fantach_lo_limit3" = 0xff,
"fanctlmain_mode1" = 0x0,
"fanctlmain_mode2" = 0x1,
"fanctlmain_mode3" = 0x1,
"fanctlmain_reserved0" = 0x0,
"fanctlmain_en_tac1" = 0x1,
"fanctlmain_en_tac2" = 0x1,
"fanctlmain_en_tac3" = 0x1,
"fanctlmain_reserved1" = 0x0,
"fanctl_enable1" = 0x1,
"fanctl_enable2" = 0x1,
"fanctl_enable3" = 0x1,
"fanctl_minduty_sel" = 0x0,
"fanctl_pwm_base_clock" = 0x5,
"fanctl_allpolarity" = 0x1,
"fanctl1_tmpin_sel" = 0x2,
"fanctl1_steps" = 0x1f,
"fanctl1_pwm_mode" = 0x1,
"fanctl2_tmpin_sel" = 0x3,
"fanctl2_steps" = 0x1f,
"fanctl2_pwm_mode" = 0x0,
"fanctl3_tmpin_sel" = 0x2,
"fanctl3_steps" = 0x10,
"fanctl3_pwm_mode" = 0x1,
"fantach_hi_counts1" = 0x1,
"fantach_hi_counts2" = 0x1,
"fantach_hi_counts3" = 0xff,
"fantach_hi_limit1" = 0xff,
"fantach_hi_limit2" = 0xff,
"fantach_hi_limit3" = 0xff,
"reserved1e" = 0x43,
"reserved1f" = 0x77,
"vin0" = 0xd2,
"vin1" = 0xb7,
"vin2" = 0x1e,
"vin3" = 0xff,
"vin4" = 0xff,
"vin5" = 0xc6,
"vin6" = 0xbf,
"vin7" = 0xc9,
"vbat" = 0xfe,
"tmpin1" = 0x1c,
"tmpin2" = 0xff,
"tmpin3" = 0x0,
"reserved2c" = 0xff,
"reserved2d" = 0x0,
"reserved2e" = 0xff,
"reserved2f" = 0x0,
"limit_hi_vin0" = 0xff,
"limit_lo_vin0" = 0x0,
"limit_hi_vin1" = 0x83,
"limit_lo_vin1" = 0x0,
"limit_hi_vin2" = 0xff,
"limit_lo_vin2" = 0x0,
"limit_hi_vin3" = 0xff,
"limit_lo_vin3" = 0x0,
"limit_hi_vin4" = 0xff,
"limit_lo_vin4" = 0x0,
"limit_hi_vin5" = 0x7f,
"limit_lo_vin5" = 0x7f,
"limit_hi_vin6" = 0x7f,
"limit_lo_vin6" = 0x7f,
"limit_hi_vin7" = 0x46,
"limit_lo_vin7" = 0x7f,
"limit_hi_tmpin1" = 0x9f,
"limit_lo_tmpin1" = 0x1c,
"limit_hi_tmpin2" = 0x7f,
"limit_lo_tmpin2" = 0x7f,
"limit_hi_tmpin3" = 0x46,
"limit_lo_tmpin3" = 0xf6,
"reserved46" = 0xf6,
"reserved47" = 0x90,
"reserved48" = 0xf6,
"reserved49" = 0x12,
"reserved4a" = 0x65,
"reserved4b" = 0x0,
"reserved4c" = 0x0,
"reserved4d" = 0x0,
"reserved4e" = 0x0,
"reserved4f" = 0x14,
"adc_scan_enable_vin0" = 0x1,
"adc_scan_enable_vin1" = 0x0,
"adc_scan_enable_vin2" = 0x0,
"adc_scan_enable_vin3" = 0x0,
"adc_scan_enable_vin4" = 0x0,
"adc_scan_enable_vin5" = 0x0,
"adc_scan_enable_vin6" = 0x1,
"adc_scan_enable_vin7" = 0x0,
"therm_diode_tmpin1" = 0x1,
"therm_diode_tmpin2" = 0x1,
"therm_diode_tmpin3" = 0x0,
"therm_resistor_tmpin1" = 0x0,
"therm_resistor_tmpin2" = 0x0,
"therm_resistor_tmpin3" = 0x1,
"therm_reserved" = 0x0,
"therm_limit_tmpin1" = 0x90,
"therm_limit_tmpin2" = 0x3,
"therm_limit_tmpin3" = 0x7f,
"therm_resistor_vin4" = 0x1,
"therm_resistor_vin5" = 0x1,
"therm_resistor_vin6" = 0x1,
"adc_fanctl2_pwm_duty" = 0x1,
"adc_fanctl2_pwm_bclk" = 0x7,
"adc_tmpin3_ext_select" = 0x0,
"thermal_zero_diode1" = 0x7f,
"thermal_zero_diode2" = 0x0,
"ite_vendor_id" = 0x0,
"thermal_zero_diode3" = 0x7f,
"reserved5a" = 0x0,
"ite_code_id" = 0x14,
"beep_fantac" = 0x1,
"beep_vin" = 0x0,
"beep_tmpin" = 0x0,
"beep_reserved" = 0x0,
"adc_clock_select" = 0x4,
"thermal_zero_adj_en" = 0x0,
"beep_fan_freq_div" = 0x3,
"beep_fan_tone_div" = 0x2,
"beep_volt_freq_div" = 0x0,
"beep_volt_tone_div" = 0x9,
"beep_temp_freq_div" = 0x3,
"beep_temp_tone_div" = 0x0,
"sguard1_temp_lim_off" = 0x0,
"sguard1_temp_lim_fan" = 0x0,
"reserved62" = 0x0,
"sguard1_pwm_start" = 0x0,
"sguard1_pwm_slope6" = 0x0,
"sguard1_pwm_slope05" = 0x0,
"sguard1_pwm_reserved" = 0x0,
"sguard1_fan_smooth_en" = 0x0,
"sguard1_temp_interval" = 0x0,
"sguard1_temp_reserved" = 0x0,
"sguard1_temp_pwm_lin" = 0x0,
"reserved66" = 0x0,
"reserved67" = 0x0,
"sguard2_temp_lim_off" = 0x0,
"sguard2_temp_lim_fan" = 0x0,
"reserved6a" = 0x2,
"sguard2_pwm_start" = 0x0,
"sguard2_pwm_slope6" = 0x0,
"sguard2_pwm_slope05" = 0x3f,
"sguard2_pwm_reserved" = 0x1,
"sguard2_fan_smooth_en" = 0x1,
"sguard2_temp_interval" = 0x0,
"sguard2_temp_reserved" = 0x0,
"sguard2_temp_pwm_lin" = 0x0,
"reserved6e" = 0x0,
"reserved6f" = 0xff,
"sguard3_temp_lim_off" = 0x0,
"sguard3_temp_lim_fan" = 0x0,
"reserved72" = 0x0,
"sguard3_pwm_start" = 0x0,
"sguard3_pwm_slope6" = 0x0,
"sguard3_pwm_slope05" = 0x0,
"sguard3_pwm_reserved" = 0x0,
"sguard3_fan_smooth_en" = 0x0,
"sguard3_temp_interval" = 0x0,
"sguard3_temp_reserved" = 0x0,
"sguard3_temp_pwm_lin" = 0x0,
"reserved76" = 0x0,
"reserved77" = 0x0,
"reserved78" = 0x0,
"reserved79" = 0x0,
"reserved7a" = 0x0,
"reserved7b" = 0x0,
"reserved7c" = 0x0,
"reserved7d" = 0x0,
"reserved7e" = 0x0,
"reserved7f" = 0x0,
"fantach_lo_counts4" = 0x0,
"fantach_hi_counts4" = 0x0,
"fantach_lo_counts5" = 0x0,
"fantach_hi_counts5" = 0x0,
"fantach_lo_limit4" = 0x0,
"fantach_hi_limit4" = 0x0,
"fantach_lo_limit5" = 0x0,
"fantach_hi_limit5" = 0x0,
"ext_host_busy" = 0x0,
"ext_host_fnsh" = 0x0,
"ext_host_r_fcs_error" = 0x0,
"ext_host_w_fcs_error" = 0x0,
"ext_host_peci_highz" = 0x0,
"ext_host_sst_slave" = 0x0,
"ext_host_sst_bus" = 0x0,
"ext_host_data_fifo_clr" = 0x0,
"ext_host_target_addr" = 0x0,
"ext_host_write_length" = 0x0,
"ext_host_read_length" = 0x0,
"ext_host_cmd" = 0x0,
"ext_host_writedata" = 0x0,
"ext_hostctl_start" = 0x0,
"ext_hostctl_sst_amdsi" = 0x0,
"ext_hostctl_sst_ctl" = 0x0,
"ext_hostctl_resetfifo" = 0x0,
"ext_hostctl_fcs_abort" = 0x0,
"ext_hostctl_start_en" = 0x0,
"ext_hostctl_start_ctl" = 0x0,
"ext_host_readdata" = 0x0,
"fan1_temp_limit_start" = 0x0,
"fan1_slope_pwm" = 0x0,
"fan1_temp_input_sel0" = 0x0,
"fan1_ctlmode_temp_ivl" = 0x0,
"fan1_ctlmode_target" = 0x0,
"fan1_temp_input_sel1" = 0x0,
"reserved93" = 0x0,
"fan2_temp_limit_start" = 0x0,
"fan2_slope_pwm" = 0x0,
"fan2_temp_input_sel0" = 0x0,
"fan2_ctlmode_temp_ivl" = 0x0,
"fan2_ctlmode_target" = 0x0,
"fan2_temp_input_sel1" = 0x0
}'superiotool' util. ( F/W = Vendor - F9; Fan Control = MODE_ON ) - 'bincfg' util. w/ 'it8718f-ec.spec' parsed - output:
{
"conf00_start" = 0x1,
"conf00_smien" = 0x1,
"conf00_irqen" = 0x0,
"conf00_irqclr" = 0x0,
"conf00_ro_one" = 0x1,
"conf00_copen" = 0x0,
"conf00_vbat" = 0x0,
"conf00_initreset" = 0x0,
"irq1_maxfantac1" = 0x0,
"irq1_maxfantac2" = 0x0,
"irq1_maxfantac3" = 0x0,
"irq1_maxfantac4" = 0x0,
"irq1_copen" = 0x0,
"irq1_reserved0" = 0x0,
"irq1_maxfantac5" = 0x0,
"irq1_reserved1" = 0x0,
"irq2_limit_vin0" = 0x0,
"irq2_limit_vin1" = 0x0,
"irq2_limit_vin2" = 0x0,
"irq2_limit_vin3" = 0x0,
"irq2_limit_vin4" = 0x0,
"irq2_limit_vin5" = 0x1,
"irq2_limit_vin6" = 0x1,
"irq2_limit_vin7" = 0x0,
"irq3_limit_temp1" = 0x0,
"irq3_limit_temp2" = 0x0,
"irq3_limit_temp3" = 0x0,
"irq3_reserved" = 0x0,
"smi1_dis_fantac1" = 0x1,
"smi1_dis_fantac2" = 0x1,
"smi1_dis_fantac3" = 0x1,
"smi1_dis_fantac4" = 0x1,
"smi1_dis_copen" = 0x1,
"smi1_reserved0" = 0x1,
"smi1_dis_fantac5" = 0x1,
"smi1_reserved1" = 0x1,
"smi2_dis_vin0" = 0x1,
"smi2_dis_vin1" = 0x1,
"smi2_dis_vin2" = 0x1,
"smi2_dis_vin3" = 0x1,
"smi2_dis_vin4" = 0x0,
"smi2_dis_vin5" = 0x1,
"smi2_dis_vin6" = 0x1,
"smi2_dis_vin7" = 0x1,
"smi3_dis_temp1" = 0x0,
"smi3_dis_temp2" = 0x0,
"smi3_dis_temp3" = 0x0,
"smi3_reserved" = 0x0,
"irqmask1_fantac1" = 0x1,
"irqmask1_fantac2" = 0x1,
"irqmask1_fantac3" = 0x1,
"irqmask1_fantac4" = 0x0,
"irqmask1_copen" = 0x1,
"irqmask1_reserved0" = 0x1,
"irqmask1_fantac5" = 0x0,
"irqmask1_reserved1" = 0x0,
"irqmask2_vin0" = 0x1,
"irqmask2_vin1" = 0x1,
"irqmask2_vin2" = 0x1,
"irqmask2_vin3" = 0x1,
"irqmask2_vin4" = 0x1,
"irqmask2_vin5" = 0x1,
"irqmask2_vin6" = 0x1,
"irqmask2_vin7" = 0x1,
"irqmask3_temp1" = 0x1,
"irqmask3_temp2" = 0x1,
"irqmask3_temp3" = 0x1,
"irqmask3_reserved" = 0x0,
"irqmask3_extsensor" = 0x1,
"iface_reserved" = 0x8,
"iface_extsensor_select" = 0x5,
"iface_pseudo_eoc" = 0x0,
"fanpwm_reserved" = 0x9,
"fanpwm_smoothing_step" = 0x0,
"fantach16_en_tac1" = 0x1,
"fantach16_en_tac2" = 0x1,
"fantach16_en_tac3" = 0x1,
"fantach16_tmpin1_enh" = 0x0,
"fantach16_en_tac4" = 0x0,
"fantach16_en_tac5" = 0x0,
"fantach16_tmpin2_enh" = 0x0,
"fantach16_tmpin3_enh" = 0x0,
"fantach_lo_counts1" = 0xe2,
"fantach_lo_counts2" = 0xc0,
"fantach_lo_counts3" = 0xff,
"fantach_lo_limit1" = 0xfe,
"fantach_lo_limit2" = 0xfe,
"fantach_lo_limit3" = 0xff,
"fanctlmain_mode1" = 0x0,
"fanctlmain_mode2" = 0x1,
"fanctlmain_mode3" = 0x0,
"fanctlmain_reserved0" = 0x0,
"fanctlmain_en_tac1" = 0x1,
"fanctlmain_en_tac2" = 0x1,
"fanctlmain_en_tac3" = 0x1,
"fanctlmain_reserved1" = 0x0,
"fanctl_enable1" = 0x1,
"fanctl_enable2" = 0x1,
"fanctl_enable3" = 0x1,
"fanctl_minduty_sel" = 0x0,
"fanctl_pwm_base_clock" = 0x5,
"fanctl_allpolarity" = 0x1,
"fanctl1_tmpin_sel" = 0x2,
"fanctl1_steps" = 0x1f,
"fanctl1_pwm_mode" = 0x1,
"fanctl2_tmpin_sel" = 0x3,
"fanctl2_steps" = 0x1f,
"fanctl2_pwm_mode" = 0x0,
"fanctl3_tmpin_sel" = 0x2,
"fanctl3_steps" = 0x10,
"fanctl3_pwm_mode" = 0x1,
"fantach_hi_counts1" = 0x0,
"fantach_hi_counts2" = 0x1,
"fantach_hi_counts3" = 0xff,
"fantach_hi_limit1" = 0xff,
"fantach_hi_limit2" = 0xff,
"fantach_hi_limit3" = 0xff,
"reserved1e" = 0x43,
"reserved1f" = 0x77,
"vin0" = 0xd2,
"vin1" = 0xb7,
"vin2" = 0x1e,
"vin3" = 0xff,
"vin4" = 0xff,
"vin5" = 0xc6,
"vin6" = 0xbf,
"vin7" = 0xc9,
"vbat" = 0xfe,
"tmpin1" = 0x1c,
"tmpin2" = 0xff,
"tmpin3" = 0x0,
"reserved2c" = 0xff,
"reserved2d" = 0x0,
"reserved2e" = 0xff,
"reserved2f" = 0x0,
"limit_hi_vin0" = 0xff,
"limit_lo_vin0" = 0x0,
"limit_hi_vin1" = 0x83,
"limit_lo_vin1" = 0x0,
"limit_hi_vin2" = 0xff,
"limit_lo_vin2" = 0x0,
"limit_hi_vin3" = 0xff,
"limit_lo_vin3" = 0x0,
"limit_hi_vin4" = 0xff,
"limit_lo_vin4" = 0x0,
"limit_hi_vin5" = 0x7f,
"limit_lo_vin5" = 0x7f,
"limit_hi_vin6" = 0x7f,
"limit_lo_vin6" = 0x7f,
"limit_hi_vin7" = 0x46,
"limit_lo_vin7" = 0x7f,
"limit_hi_tmpin1" = 0x9f,
"limit_lo_tmpin1" = 0x1c,
"limit_hi_tmpin2" = 0x7f,
"limit_lo_tmpin2" = 0x7f,
"limit_hi_tmpin3" = 0x46,
"limit_lo_tmpin3" = 0xf6,
"reserved46" = 0xf6,
"reserved47" = 0x90,
"reserved48" = 0xf6,
"reserved49" = 0x12,
"reserved4a" = 0x65,
"reserved4b" = 0x0,
"reserved4c" = 0x0,
"reserved4d" = 0x0,
"reserved4e" = 0x0,
"reserved4f" = 0x14,
"adc_scan_enable_vin0" = 0x1,
"adc_scan_enable_vin1" = 0x0,
"adc_scan_enable_vin2" = 0x0,
"adc_scan_enable_vin3" = 0x0,
"adc_scan_enable_vin4" = 0x0,
"adc_scan_enable_vin5" = 0x0,
"adc_scan_enable_vin6" = 0x1,
"adc_scan_enable_vin7" = 0x0,
"therm_diode_tmpin1" = 0x1,
"therm_diode_tmpin2" = 0x1,
"therm_diode_tmpin3" = 0x0,
"therm_resistor_tmpin1" = 0x0,
"therm_resistor_tmpin2" = 0x0,
"therm_resistor_tmpin3" = 0x1,
"therm_reserved" = 0x0,
"therm_limit_tmpin1" = 0x90,
"therm_limit_tmpin2" = 0x3,
"therm_limit_tmpin3" = 0x7f,
"therm_resistor_vin4" = 0x1,
"therm_resistor_vin5" = 0x1,
"therm_resistor_vin6" = 0x1,
"adc_fanctl2_pwm_duty" = 0x1,
"adc_fanctl2_pwm_bclk" = 0x7,
"adc_tmpin3_ext_select" = 0x0,
"thermal_zero_diode1" = 0x7f,
"thermal_zero_diode2" = 0x0,
"ite_vendor_id" = 0x0,
"thermal_zero_diode3" = 0x7f,
"reserved5a" = 0x0,
"ite_code_id" = 0x14,
"beep_fantac" = 0x1,
"beep_vin" = 0x0,
"beep_tmpin" = 0x0,
"beep_reserved" = 0x0,
"adc_clock_select" = 0x4,
"thermal_zero_adj_en" = 0x0,
"beep_fan_freq_div" = 0x3,
"beep_fan_tone_div" = 0x2,
"beep_volt_freq_div" = 0x0,
"beep_volt_tone_div" = 0x9,
"beep_temp_freq_div" = 0x3,
"beep_temp_tone_div" = 0x0,
"sguard1_temp_lim_off" = 0x0,
"sguard1_temp_lim_fan" = 0x0,
"reserved62" = 0x0,
"sguard1_pwm_start" = 0x0,
"sguard1_pwm_slope6" = 0x0,
"sguard1_pwm_slope05" = 0x0,
"sguard1_pwm_reserved" = 0x0,
"sguard1_fan_smooth_en" = 0x0,
"sguard1_temp_interval" = 0x0,
"sguard1_temp_reserved" = 0x0,
"sguard1_temp_pwm_lin" = 0x0,
"reserved66" = 0x0,
"reserved67" = 0x0,
"sguard2_temp_lim_off" = 0x0,
"sguard2_temp_lim_fan" = 0x0,
"reserved6a" = 0x2,
"sguard2_pwm_start" = 0x0,
"sguard2_pwm_slope6" = 0x0,
"sguard2_pwm_slope05" = 0x3f,
"sguard2_pwm_reserved" = 0x1,
"sguard2_fan_smooth_en" = 0x1,
"sguard2_temp_interval" = 0x0,
"sguard2_temp_reserved" = 0x0,
"sguard2_temp_pwm_lin" = 0x0,
"reserved6e" = 0x0,
"reserved6f" = 0xff,
"sguard3_temp_lim_off" = 0x0,
"sguard3_temp_lim_fan" = 0x0,
"reserved72" = 0x0,
"sguard3_pwm_start" = 0x0,
"sguard3_pwm_slope6" = 0x0,
"sguard3_pwm_slope05" = 0x0,
"sguard3_pwm_reserved" = 0x0,
"sguard3_fan_smooth_en" = 0x0,
"sguard3_temp_interval" = 0x0,
"sguard3_temp_reserved" = 0x0,
"sguard3_temp_pwm_lin" = 0x0,
"reserved76" = 0x0,
"reserved77" = 0x0,
"reserved78" = 0x0,
"reserved79" = 0x0,
"reserved7a" = 0x0,
"reserved7b" = 0x0,
"reserved7c" = 0x0,
"reserved7d" = 0x0,
"reserved7e" = 0x0,
"reserved7f" = 0x0,
"fantach_lo_counts4" = 0x0,
"fantach_hi_counts4" = 0x0,
"fantach_lo_counts5" = 0x0,
"fantach_hi_counts5" = 0x0,
"fantach_lo_limit4" = 0x0,
"fantach_hi_limit4" = 0x0,
"fantach_lo_limit5" = 0x0,
"fantach_hi_limit5" = 0x0,
"ext_host_busy" = 0x0,
"ext_host_fnsh" = 0x0,
"ext_host_r_fcs_error" = 0x0,
"ext_host_w_fcs_error" = 0x0,
"ext_host_peci_highz" = 0x0,
"ext_host_sst_slave" = 0x0,
"ext_host_sst_bus" = 0x0,
"ext_host_data_fifo_clr" = 0x0,
"ext_host_target_addr" = 0x0,
"ext_host_write_length" = 0x0,
"ext_host_read_length" = 0x0,
"ext_host_cmd" = 0x0,
"ext_host_writedata" = 0x0,
"ext_hostctl_start" = 0x0,
"ext_hostctl_sst_amdsi" = 0x0,
"ext_hostctl_sst_ctl" = 0x0,
"ext_hostctl_resetfifo" = 0x0,
"ext_hostctl_fcs_abort" = 0x0,
"ext_hostctl_start_en" = 0x0,
"ext_hostctl_start_ctl" = 0x0,
"ext_host_readdata" = 0x0,
"fan1_temp_limit_start" = 0x0,
"fan1_slope_pwm" = 0x0,
"fan1_temp_input_sel0" = 0x0,
"fan1_ctlmode_temp_ivl" = 0x0,
"fan1_ctlmode_target" = 0x0,
"fan1_temp_input_sel1" = 0x0,
"reserved93" = 0x0,
"fan2_temp_limit_start" = 0x0,
"fan2_slope_pwm" = 0x0,
"fan2_temp_input_sel0" = 0x0,
"fan2_ctlmode_temp_ivl" = 0x0,
"fan2_ctlmode_target" = 0x0,
"fan2_temp_input_sel1" = 0x0
}'superiotool' util. ( F/W = Coreboot - git# bba18c5540; Fan1 Control = SMART_AUTOMATIC; Fan2 Control = MODE_ON ) - 'bincfg' util. w/ 'it8718f-ec.spec' parsed - output:
{
"conf00_start" = 0x1,
"conf00_smien" = 0x0,
"conf00_irqen" = 0x0,
"conf00_irqclr" = 0x1,
"conf00_ro_one" = 0x1,
"conf00_copen" = 0x0,
"conf00_vbat" = 0x0,
"conf00_initreset" = 0x0,
"irq1_maxfantac1" = 0x0,
"irq1_maxfantac2" = 0x0,
"irq1_maxfantac3" = 0x0,
"irq1_maxfantac4" = 0x0,
"irq1_copen" = 0x0,
"irq1_reserved0" = 0x0,
"irq1_maxfantac5" = 0x0,
"irq1_reserved1" = 0x0,
"irq2_limit_vin0" = 0x1,
"irq2_limit_vin1" = 0x1,
"irq2_limit_vin2" = 0x1,
"irq2_limit_vin3" = 0x1,
"irq2_limit_vin4" = 0x1,
"irq2_limit_vin5" = 0x1,
"irq2_limit_vin6" = 0x1,
"irq2_limit_vin7" = 0x1,
"irq3_limit_temp1" = 0x0,
"irq3_limit_temp2" = 0x0,
"irq3_limit_temp3" = 0x0,
"irq3_reserved" = 0x0,
"smi1_dis_fantac1" = 0x0,
"smi1_dis_fantac2" = 0x0,
"smi1_dis_fantac3" = 0x0,
"smi1_dis_fantac4" = 0x0,
"smi1_dis_copen" = 0x0,
"smi1_reserved0" = 0x0,
"smi1_dis_fantac5" = 0x0,
"smi1_reserved1" = 0x0,
"smi2_dis_vin0" = 0x0,
"smi2_dis_vin1" = 0x0,
"smi2_dis_vin2" = 0x0,
"smi2_dis_vin3" = 0x0,
"smi2_dis_vin4" = 0x0,
"smi2_dis_vin5" = 0x0,
"smi2_dis_vin6" = 0x0,
"smi2_dis_vin7" = 0x0,
"smi3_dis_temp1" = 0x0,
"smi3_dis_temp2" = 0x0,
"smi3_dis_temp3" = 0x0,
"smi3_reserved" = 0x0,
"irqmask1_fantac1" = 0x0,
"irqmask1_fantac2" = 0x0,
"irqmask1_fantac3" = 0x0,
"irqmask1_fantac4" = 0x0,
"irqmask1_copen" = 0x0,
"irqmask1_reserved0" = 0x0,
"irqmask1_fantac5" = 0x0,
"irqmask1_reserved1" = 0x0,
"irqmask2_vin0" = 0x0,
"irqmask2_vin1" = 0x0,
"irqmask2_vin2" = 0x0,
"irqmask2_vin3" = 0x0,
"irqmask2_vin4" = 0x0,
"irqmask2_vin5" = 0x0,
"irqmask2_vin6" = 0x0,
"irqmask2_vin7" = 0x0,
"irqmask3_temp1" = 0x0,
"irqmask3_temp2" = 0x0,
"irqmask3_temp3" = 0x0,
"irqmask3_reserved" = 0x0,
"irqmask3_extsensor" = 0x1,
"iface_reserved" = 0x8,
"iface_extsensor_select" = 0x5,
"iface_pseudo_eoc" = 0x0,
"fanpwm_reserved" = 0x9,
"fanpwm_smoothing_step" = 0x0,
"fantach16_en_tac1" = 0x1,
"fantach16_en_tac2" = 0x1,
"fantach16_en_tac3" = 0x0,
"fantach16_tmpin1_enh" = 0x0,
"fantach16_en_tac4" = 0x0,
"fantach16_en_tac5" = 0x0,
"fantach16_tmpin2_enh" = 0x0,
"fantach16_tmpin3_enh" = 0x0,
"fantach_lo_counts1" = 0x40,
"fantach_lo_counts2" = 0xbd,
"fantach_lo_counts3" = 0x0,
"fantach_lo_limit1" = 0xff,
"fantach_lo_limit2" = 0xff,
"fantach_lo_limit3" = 0xff,
"fanctlmain_mode1" = 0x1,
"fanctlmain_mode2" = 0x0,
"fanctlmain_mode3" = 0x1,
"fanctlmain_reserved0" = 0x0,
"fanctlmain_en_tac1" = 0x1,
"fanctlmain_en_tac2" = 0x1,
"fanctlmain_en_tac3" = 0x0,
"fanctlmain_reserved1" = 0x0,
"fanctl_enable1" = 0x0,
"fanctl_enable2" = 0x1,
"fanctl_enable3" = 0x0,
"fanctl_minduty_sel" = 0x0,
"fanctl_pwm_base_clock" = 0x5,
"fanctl_allpolarity" = 0x1,
"fanctl1_tmpin_sel" = 0x2,
"fanctl1_steps" = 0x0,
"fanctl1_pwm_mode" = 0x1,
"fanctl2_tmpin_sel" = 0x0,
"fanctl2_steps" = 0x10,
"fanctl2_pwm_mode" = 0x0,
"fanctl3_tmpin_sel" = 0x0,
"fanctl3_steps" = 0x10,
"fanctl3_pwm_mode" = 0x0,
"fantach_hi_counts1" = 0x1,
"fantach_hi_counts2" = 0x1,
"fantach_hi_counts3" = 0x0,
"fantach_hi_limit1" = 0xff,
"fantach_hi_limit2" = 0xff,
"fantach_hi_limit3" = 0xff,
"reserved1e" = 0x43,
"reserved1f" = 0x77,
"vin0" = 0xd2,
"vin1" = 0xb7,
"vin2" = 0x1f,
"vin3" = 0xff,
"vin4" = 0xff,
"vin5" = 0xc6,
"vin6" = 0xbf,
"vin7" = 0xc9,
"vbat" = 0xfe,
"tmpin1" = 0x2d,
"tmpin2" = 0xff,
"tmpin3" = 0x0,
"reserved2c" = 0xff,
"reserved2d" = 0x0,
"reserved2e" = 0xff,
"reserved2f" = 0x0,
"limit_hi_vin0" = 0xff,
"limit_lo_vin0" = 0x0,
"limit_hi_vin1" = 0xff,
"limit_lo_vin1" = 0x0,
"limit_hi_vin2" = 0xff,
"limit_lo_vin2" = 0x0,
"limit_hi_vin3" = 0xff,
"limit_lo_vin3" = 0x0,
"limit_hi_vin4" = 0xff,
"limit_lo_vin4" = 0x0,
"limit_hi_vin5" = 0x7f,
"limit_lo_vin5" = 0x0,
"limit_hi_vin6" = 0x7f,
"limit_lo_vin6" = 0x0,
"limit_hi_vin7" = 0x7f,
"limit_lo_vin7" = 0x0,
"limit_hi_tmpin1" = 0x9f,
"limit_lo_tmpin1" = 0x1c,
"limit_hi_tmpin2" = 0x7f,
"limit_lo_tmpin2" = 0x7f,
"limit_hi_tmpin3" = 0x7f,
"limit_lo_tmpin3" = 0x0,
"reserved46" = 0x0,
"reserved47" = 0x90,
"reserved48" = 0x0,
"reserved49" = 0x12,
"reserved4a" = 0xe0,
"reserved4b" = 0x0,
"reserved4c" = 0x0,
"reserved4d" = 0x0,
"reserved4e" = 0x19,
"reserved4f" = 0x1e,
"adc_scan_enable_vin0" = 0x1,
"adc_scan_enable_vin1" = 0x0,
"adc_scan_enable_vin2" = 0x0,
"adc_scan_enable_vin3" = 0x0,
"adc_scan_enable_vin4" = 0x0,
"adc_scan_enable_vin5" = 0x0,
"adc_scan_enable_vin6" = 0x1,
"adc_scan_enable_vin7" = 0x0,
"therm_diode_tmpin1" = 0x0,
"therm_diode_tmpin2" = 0x0,
"therm_diode_tmpin3" = 0x0,
"therm_resistor_tmpin1" = 0x0,
"therm_resistor_tmpin2" = 0x0,
"therm_resistor_tmpin3" = 0x0,
"therm_reserved" = 0x0,
"therm_limit_tmpin1" = 0x8a,
"therm_limit_tmpin2" = 0x3,
"therm_limit_tmpin3" = 0x7f,
"therm_resistor_vin4" = 0x1,
"therm_resistor_vin5" = 0x1,
"therm_resistor_vin6" = 0x1,
"adc_fanctl2_pwm_duty" = 0x1,
"adc_fanctl2_pwm_bclk" = 0x7,
"adc_tmpin3_ext_select" = 0x0,
"thermal_zero_diode1" = 0x7f,
"thermal_zero_diode2" = 0x0,
"ite_vendor_id" = 0x0,
"thermal_zero_diode3" = 0x7f,
"reserved5a" = 0x7f,
"ite_code_id" = 0x7f,
"beep_fantac" = 0x1,
"beep_vin" = 0x1,
"beep_tmpin" = 0x1,
"beep_reserved" = 0x1,
"adc_clock_select" = 0x7,
"thermal_zero_adj_en" = 0x0,
"beep_fan_freq_div" = 0x0,
"beep_fan_tone_div" = 0x0,
"beep_volt_freq_div" = 0x0,
"beep_volt_tone_div" = 0x0,
"beep_temp_freq_div" = 0xf,
"beep_temp_tone_div" = 0x7,
"sguard1_temp_lim_off" = 0x0,
"sguard1_temp_lim_fan" = 0x0,
"reserved62" = 0x0,
"sguard1_pwm_start" = 0x0,
"sguard1_pwm_slope6" = 0x0,
"sguard1_pwm_slope05" = 0x0,
"sguard1_pwm_reserved" = 0x0,
"sguard1_fan_smooth_en" = 0x0,
"sguard1_temp_interval" = 0x0,
"sguard1_temp_reserved" = 0x0,
"sguard1_temp_pwm_lin" = 0x0,
"reserved66" = 0x0,
"reserved67" = 0x0,
"sguard2_temp_lim_off" = 0x0,
"sguard2_temp_lim_fan" = 0x0,
"reserved6a" = 0x2,
"sguard2_pwm_start" = 0x0,
"sguard2_pwm_slope6" = 0x0,
"sguard2_pwm_slope05" = 0x3f,
"sguard2_pwm_reserved" = 0x1,
"sguard2_fan_smooth_en" = 0x1,
"sguard2_temp_interval" = 0x0,
"sguard2_temp_reserved" = 0x0,
"sguard2_temp_pwm_lin" = 0x0,
"reserved6e" = 0x0,
"reserved6f" = 0xff,
"sguard3_temp_lim_off" = 0x0,
"sguard3_temp_lim_fan" = 0x0,
"reserved72" = 0x0,
"sguard3_pwm_start" = 0x0,
"sguard3_pwm_slope6" = 0x0,
"sguard3_pwm_slope05" = 0x0,
"sguard3_pwm_reserved" = 0x0,
"sguard3_fan_smooth_en" = 0x0,
"sguard3_temp_interval" = 0x0,
"sguard3_temp_reserved" = 0x0,
"sguard3_temp_pwm_lin" = 0x0,
"reserved76" = 0x0,
"reserved77" = 0x0,
"reserved78" = 0x0,
"reserved79" = 0x0,
"reserved7a" = 0x0,
"reserved7b" = 0x0,
"reserved7c" = 0x0,
"reserved7d" = 0x0,
"reserved7e" = 0x0,
"reserved7f" = 0x0,
"fantach_lo_counts4" = 0x0,
"fantach_hi_counts4" = 0x0,
"fantach_lo_counts5" = 0x0,
"fantach_hi_counts5" = 0x0,
"fantach_lo_limit4" = 0x0,
"fantach_hi_limit4" = 0x0,
"fantach_lo_limit5" = 0x0,
"fantach_hi_limit5" = 0x0,
"ext_host_busy" = 0x0,
"ext_host_fnsh" = 0x0,
"ext_host_r_fcs_error" = 0x0,
"ext_host_w_fcs_error" = 0x0,
"ext_host_peci_highz" = 0x0,
"ext_host_sst_slave" = 0x0,
"ext_host_sst_bus" = 0x0,
"ext_host_data_fifo_clr" = 0x0,
"ext_host_target_addr" = 0x0,
"ext_host_write_length" = 0x0,
"ext_host_read_length" = 0x0,
"ext_host_cmd" = 0x0,
"ext_host_writedata" = 0x0,
"ext_hostctl_start" = 0x0,
"ext_hostctl_sst_amdsi" = 0x0,
"ext_hostctl_sst_ctl" = 0x0,
"ext_hostctl_resetfifo" = 0x0,
"ext_hostctl_fcs_abort" = 0x0,
"ext_hostctl_start_en" = 0x0,
"ext_hostctl_start_ctl" = 0x0,
"ext_host_readdata" = 0x0,
"fan1_temp_limit_start" = 0x0,
"fan1_slope_pwm" = 0x0,
"fan1_temp_input_sel0" = 0x0,
"fan1_ctlmode_temp_ivl" = 0x0,
"fan1_ctlmode_target" = 0x0,
"fan1_temp_input_sel1" = 0x0,
"reserved93" = 0x0,
"fan2_temp_limit_start" = 0x0,
"fan2_slope_pwm" = 0x0,
"fan2_temp_input_sel0" = 0x0,
"fan2_ctlmode_temp_ivl" = 0x0,
"fan2_ctlmode_target" = 0x0,
"fan2_temp_input_sel1" = 0x0
}'superiotool' util. ( F/W = Coreboot - git# bba18c5540; Fan1 Control = MODE_ON; Fan2 Control = MODE_ON ) - 'bincfg' util. w/ 'it8718f-ec.spec' parsed - output:
{
"conf00_start" = 0x1,
"conf00_smien" = 0x0,
"conf00_irqen" = 0x0,
"conf00_irqclr" = 0x1,
"conf00_ro_one" = 0x1,
"conf00_copen" = 0x0,
"conf00_vbat" = 0x0,
"conf00_initreset" = 0x0,
"irq1_maxfantac1" = 0x0,
"irq1_maxfantac2" = 0x0,
"irq1_maxfantac3" = 0x0,
"irq1_maxfantac4" = 0x0,
"irq1_copen" = 0x0,
"irq1_reserved0" = 0x0,
"irq1_maxfantac5" = 0x0,
"irq1_reserved1" = 0x0,
"irq2_limit_vin0" = 0x0,
"irq2_limit_vin1" = 0x0,
"irq2_limit_vin2" = 0x0,
"irq2_limit_vin3" = 0x0,
"irq2_limit_vin4" = 0x0,
"irq2_limit_vin5" = 0x1,
"irq2_limit_vin6" = 0x1,
"irq2_limit_vin7" = 0x0,
"irq3_limit_temp1" = 0x0,
"irq3_limit_temp2" = 0x0,
"irq3_limit_temp3" = 0x0,
"irq3_reserved" = 0x0,
"smi1_dis_fantac1" = 0x0,
"smi1_dis_fantac2" = 0x0,
"smi1_dis_fantac3" = 0x0,
"smi1_dis_fantac4" = 0x0,
"smi1_dis_copen" = 0x0,
"smi1_reserved0" = 0x0,
"smi1_dis_fantac5" = 0x0,
"smi1_reserved1" = 0x0,
"smi2_dis_vin0" = 0x0,
"smi2_dis_vin1" = 0x0,
"smi2_dis_vin2" = 0x0,
"smi2_dis_vin3" = 0x0,
"smi2_dis_vin4" = 0x0,
"smi2_dis_vin5" = 0x0,
"smi2_dis_vin6" = 0x0,
"smi2_dis_vin7" = 0x0,
"smi3_dis_temp1" = 0x0,
"smi3_dis_temp2" = 0x0,
"smi3_dis_temp3" = 0x0,
"smi3_reserved" = 0x0,
"irqmask1_fantac1" = 0x0,
"irqmask1_fantac2" = 0x0,
"irqmask1_fantac3" = 0x0,
"irqmask1_fantac4" = 0x0,
"irqmask1_copen" = 0x0,
"irqmask1_reserved0" = 0x0,
"irqmask1_fantac5" = 0x0,
"irqmask1_reserved1" = 0x0,
"irqmask2_vin0" = 0x0,
"irqmask2_vin1" = 0x0,
"irqmask2_vin2" = 0x0,
"irqmask2_vin3" = 0x0,
"irqmask2_vin4" = 0x0,
"irqmask2_vin5" = 0x0,
"irqmask2_vin6" = 0x0,
"irqmask2_vin7" = 0x0,
"irqmask3_temp1" = 0x0,
"irqmask3_temp2" = 0x0,
"irqmask3_temp3" = 0x0,
"irqmask3_reserved" = 0x0,
"irqmask3_extsensor" = 0x1,
"iface_reserved" = 0x8,
"iface_extsensor_select" = 0x5,
"iface_pseudo_eoc" = 0x0,
"fanpwm_reserved" = 0x9,
"fanpwm_smoothing_step" = 0x0,
"fantach16_en_tac1" = 0x1,
"fantach16_en_tac2" = 0x1,
"fantach16_en_tac3" = 0x0,
"fantach16_tmpin1_enh" = 0x0,
"fantach16_en_tac4" = 0x0,
"fantach16_en_tac5" = 0x0,
"fantach16_tmpin2_enh" = 0x0,
"fantach16_tmpin3_enh" = 0x0,
"fantach_lo_counts1" = 0x3f,
"fantach_lo_counts2" = 0xbd,
"fantach_lo_counts3" = 0x0,
"fantach_lo_limit1" = 0xff,
"fantach_lo_limit2" = 0xff,
"fantach_lo_limit3" = 0xff,
"fanctlmain_mode1" = 0x0,
"fanctlmain_mode2" = 0x0,
"fanctlmain_mode3" = 0x1,
"fanctlmain_reserved0" = 0x0,
"fanctlmain_en_tac1" = 0x1,
"fanctlmain_en_tac2" = 0x1,
"fanctlmain_en_tac3" = 0x0,
"fanctlmain_reserved1" = 0x0,
"fanctl_enable1" = 0x1,
"fanctl_enable2" = 0x1,
"fanctl_enable3" = 0x0,
"fanctl_minduty_sel" = 0x0,
"fanctl_pwm_base_clock" = 0x5,
"fanctl_allpolarity" = 0x1,
"fanctl1_tmpin_sel" = 0x0,
"fanctl1_steps" = 0x10,
"fanctl1_pwm_mode" = 0x0,
"fanctl2_tmpin_sel" = 0x0,
"fanctl2_steps" = 0x10,
"fanctl2_pwm_mode" = 0x0,
"fanctl3_tmpin_sel" = 0x0,
"fanctl3_steps" = 0x10,
"fanctl3_pwm_mode" = 0x0,
"fantach_hi_counts1" = 0x1,
"fantach_hi_counts2" = 0x1,
"fantach_hi_counts3" = 0x0,
"fantach_hi_limit1" = 0xff,
"fantach_hi_limit2" = 0xff,
"fantach_hi_limit3" = 0xff,
"reserved1e" = 0x42,
"reserved1f" = 0x77,
"vin0" = 0xd2,
"vin1" = 0xb7,
"vin2" = 0x1e,
"vin3" = 0xff,
"vin4" = 0xff,
"vin5" = 0xc6,
"vin6" = 0xbf,
"vin7" = 0xc9,
"vbat" = 0xfe,
"tmpin1" = 0x2d,
"tmpin2" = 0xff,
"tmpin3" = 0x0,
"reserved2c" = 0xff,
"reserved2d" = 0x0,
"reserved2e" = 0xff,
"reserved2f" = 0x0,
"limit_hi_vin0" = 0xff,
"limit_lo_vin0" = 0x0,
"limit_hi_vin1" = 0xff,
"limit_lo_vin1" = 0x0,
"limit_hi_vin2" = 0xff,
"limit_lo_vin2" = 0x0,
"limit_hi_vin3" = 0xff,
"limit_lo_vin3" = 0x0,
"limit_hi_vin4" = 0xff,
"limit_lo_vin4" = 0x0,
"limit_hi_vin5" = 0x7f,
"limit_lo_vin5" = 0x0,
"limit_hi_vin6" = 0x7f,
"limit_lo_vin6" = 0x0,
"limit_hi_vin7" = 0x7f,
"limit_lo_vin7" = 0x0,
"limit_hi_tmpin1" = 0x9f,
"limit_lo_tmpin1" = 0x1c,
"limit_hi_tmpin2" = 0x7f,
"limit_lo_tmpin2" = 0x7f,
"limit_hi_tmpin3" = 0x7f,
"limit_lo_tmpin3" = 0x0,
"reserved46" = 0x0,
"reserved47" = 0x90,
"reserved48" = 0x0,
"reserved49" = 0x12,
"reserved4a" = 0xe0,
"reserved4b" = 0x0,
"reserved4c" = 0x0,
"reserved4d" = 0x0,
"reserved4e" = 0x7f,
"reserved4f" = 0x7f,
"adc_scan_enable_vin0" = 0x1,
"adc_scan_enable_vin1" = 0x1,
"adc_scan_enable_vin2" = 0x1,
"adc_scan_enable_vin3" = 0x1,
"adc_scan_enable_vin4" = 0x1,
"adc_scan_enable_vin5" = 0x1,
"adc_scan_enable_vin6" = 0x1,
"adc_scan_enable_vin7" = 0x0,
"therm_diode_tmpin1" = 0x0,
"therm_diode_tmpin2" = 0x0,
"therm_diode_tmpin3" = 0x0,
"therm_resistor_tmpin1" = 0x0,
"therm_resistor_tmpin2" = 0x0,
"therm_resistor_tmpin3" = 0x0,
"therm_reserved" = 0x0,
"therm_limit_tmpin1" = 0x0,
"therm_limit_tmpin2" = 0x7f,
"therm_limit_tmpin3" = 0x7f,
"therm_resistor_vin4" = 0x1,
"therm_resistor_vin5" = 0x1,
"therm_resistor_vin6" = 0x1,
"adc_fanctl2_pwm_duty" = 0x1,
"adc_fanctl2_pwm_bclk" = 0x7,
"adc_tmpin3_ext_select" = 0x0,
"thermal_zero_diode1" = 0x7f,
"thermal_zero_diode2" = 0x0,
"ite_vendor_id" = 0x0,
"thermal_zero_diode3" = 0x7f,
"reserved5a" = 0x7f,
"ite_code_id" = 0x7f,
"beep_fantac" = 0x1,
"beep_vin" = 0x1,
"beep_tmpin" = 0x1,
"beep_reserved" = 0x1,
"adc_clock_select" = 0x7,
"thermal_zero_adj_en" = 0x0,
"beep_fan_freq_div" = 0x0,
"beep_fan_tone_div" = 0x0,
"beep_volt_freq_div" = 0x0,
"beep_volt_tone_div" = 0x0,
"beep_temp_freq_div" = 0xf,
"beep_temp_tone_div" = 0x7,
"sguard1_temp_lim_off" = 0x0,
"sguard1_temp_lim_fan" = 0x0,
"reserved62" = 0x0,
"sguard1_pwm_start" = 0x0,
"sguard1_pwm_slope6" = 0x0,
"sguard1_pwm_slope05" = 0x0,
"sguard1_pwm_reserved" = 0x0,
"sguard1_fan_smooth_en" = 0x0,
"sguard1_temp_interval" = 0x0,
"sguard1_temp_reserved" = 0x0,
"sguard1_temp_pwm_lin" = 0x0,
"reserved66" = 0x0,
"reserved67" = 0x0,
"sguard2_temp_lim_off" = 0x0,
"sguard2_temp_lim_fan" = 0x0,
"reserved6a" = 0x2,
"sguard2_pwm_start" = 0x0,
"sguard2_pwm_slope6" = 0x0,
"sguard2_pwm_slope05" = 0x3f,
"sguard2_pwm_reserved" = 0x1,
"sguard2_fan_smooth_en" = 0x1,
"sguard2_temp_interval" = 0x0,
"sguard2_temp_reserved" = 0x0,
"sguard2_temp_pwm_lin" = 0x0,
"reserved6e" = 0x0,
"reserved6f" = 0xff,
"sguard3_temp_lim_off" = 0x0,
"sguard3_temp_lim_fan" = 0x0,
"reserved72" = 0x0,
"sguard3_pwm_start" = 0x0,
"sguard3_pwm_slope6" = 0x0,
"sguard3_pwm_slope05" = 0x0,
"sguard3_pwm_reserved" = 0x0,
"sguard3_fan_smooth_en" = 0x0,
"sguard3_temp_interval" = 0x0,
"sguard3_temp_reserved" = 0x0,
"sguard3_temp_pwm_lin" = 0x0,
"reserved76" = 0x0,
"reserved77" = 0x0,
"reserved78" = 0x0,
"reserved79" = 0x0,
"reserved7a" = 0x0,
"reserved7b" = 0x0,
"reserved7c" = 0x0,
"reserved7d" = 0x0,
"reserved7e" = 0x0,
"reserved7f" = 0x0,
"fantach_lo_counts4" = 0x0,
"fantach_hi_counts4" = 0x0,
"fantach_lo_counts5" = 0x0,
"fantach_hi_counts5" = 0x0,
"fantach_lo_limit4" = 0x0,
"fantach_hi_limit4" = 0x0,
"fantach_lo_limit5" = 0x0,
"fantach_hi_limit5" = 0x0,
"ext_host_busy" = 0x0,
"ext_host_fnsh" = 0x0,
"ext_host_r_fcs_error" = 0x0,
"ext_host_w_fcs_error" = 0x0,
"ext_host_peci_highz" = 0x0,
"ext_host_sst_slave" = 0x0,
"ext_host_sst_bus" = 0x0,
"ext_host_data_fifo_clr" = 0x0,
"ext_host_target_addr" = 0x0,
"ext_host_write_length" = 0x0,
"ext_host_read_length" = 0x0,
"ext_host_cmd" = 0x0,
"ext_host_writedata" = 0x0,
"ext_hostctl_start" = 0x0,
"ext_hostctl_sst_amdsi" = 0x0,
"ext_hostctl_sst_ctl" = 0x0,
"ext_hostctl_resetfifo" = 0x0,
"ext_hostctl_fcs_abort" = 0x0,
"ext_hostctl_start_en" = 0x0,
"ext_hostctl_start_ctl" = 0x0,
"ext_host_readdata" = 0x0,
"fan1_temp_limit_start" = 0x0,
"fan1_slope_pwm" = 0x0,
"fan1_temp_input_sel0" = 0x0,
"fan1_ctlmode_temp_ivl" = 0x0,
"fan1_ctlmode_target" = 0x0,
"fan1_temp_input_sel1" = 0x0,
"reserved93" = 0x0,
"fan2_temp_limit_start" = 0x0,
"fan2_slope_pwm" = 0x0,
"fan2_temp_input_sel0" = 0x0,
"fan2_ctlmode_temp_ivl" = 0x0,
"fan2_ctlmode_target" = 0x0,
"fan2_temp_input_sel1" = 0x0
}'sensors' util. - sample output (CPU: Intel Xeon L5420, CPU Fan: Delta AUB0812H; Fan Control = MODE_ON ):
coretemp-isa-0000
Adapter: ISA adapter
Core 0: +53.0°C (high = +73.0°C, crit = +85.0°C)
Core 1: +47.0°C (high = +73.0°C, crit = +85.0°C)
Core 2: +51.0°C (high = +73.0°C, crit = +85.0°C)
Core 3: +51.0°C (high = +73.0°C, crit = +85.0°C)
it8718-isa-0290
Adapter: ISA adapter
in0: +1.07 V (min = +0.00 V, max = +4.08 V)
in1: +1.90 V (min = +0.00 V, max = +4.08 V)
in2: +3.36 V (min = +0.00 V, max = +4.08 V)
+5V: +2.93 V (min = +0.00 V, max = +4.08 V)
in4: +0.61 V (min = +0.00 V, max = +2.10 V)
in5: +4.08 V (min = +0.00 V, max = +4.08 V) ALARM
in6: +4.08 V (min = +0.00 V, max = +4.08 V) ALARM
in7: +3.17 V (min = +0.00 V, max = +4.08 V)
Vbat: +3.06 V
fan1: 3013 RPM (min = 10 RPM)
fan2: 1513 RPM (min = 10 RPM)
temp1: -55.0°C (low = +127.0°C, high = +127.0°C) sensor = thermistor
temp2: -2.0°C (low = +127.0°C, high = +127.0°C) sensor = thermistor
temp3: +28.0°C (low = +127.0°C, high = +70.0°C) sensor = thermal diode
cpu0_vid: +1.150 V
intrusion0: OKAlso, I've Noticed That:
~While The Raw, Unparsed, 'superiotool' util. Output, Is Different On 'Vendor vs. Coreboot', The Parsed Output, On The Contrary, Is Identical ( I verified that with 'sha1sum' )...~ [ I originally used the 'bincfg' util. incorrectly ]
The 'Slope' in the 'SMART_AUTOMATIC' Mode (Vendor F/W) is way too moderate: while it does Speed-Up the Fan as the Temp. rise, the Temp. eventually stabilized at ~73°C under Full Load - way too high for comfort... & that's with an Open Case, in a Well Ventilated Area (although it's a hot summer day).
mzcs
commented
5 years ago 'superiotool' util. ( F/W = Coreboot - git# bba18c5540; Fan Control = MODE_ON; CPU Load = ~0% ) - Raw (unparsed) - output:
superiotool r4.10-140-gbba18c5540
Found ITE IT8718F (id=0x8718, rev=0x8) at 0x2e
Register dump:
idx val def
0x20: 0x87 (0x87)
0x21: 0x18 (0x18)
0x22: 0x08 (0x01)
0x23: 0x00 (0x00)
0x24: 0x00 (0x00)
0x2b: 0x00 (0x00)
<...>
LDN 0x04 (Environment controller)
idx val def
0x30: 0x01 (0x00)
0x60: 0x02 (0x02)
0x61: 0x90 (0x90)
0x62: 0x00 (0x02)
0x63: 0x00 (0x30)
0x70: 0x00 (0x09)
0xf0: 0x00 (0x00)
0xf1: 0x00 (0x00)
0xf2: 0x0a (0x00)
0xf3: 0x80 (0x00)
0xf4: 0x00 (0x00)
0xf5: 0x00 (NA)
0xf6: 0x00 (NA)
<...>
LDN 0x07 (GPIO)
idx val def
0x25: 0x00 (0x01)
0x26: 0xc7 (0x00)
0x27: 0x80 (0x00)
0x28: 0x41 (0x40)
0x29: 0x0a (0x00)
0x2a: 0x00 (0x00)
0x2c: 0x01 (0x00)
0x60: 0x00 (0x00)
0x61: 0x00 (0x00)
0x62: 0x08 (0x00)
0x63: 0x00 (0x00)
0x64: 0x00 (0x00)
0x65: 0x00 (0x00)
0x70: 0x00 (0x00)
0x71: 0x00 (0x00)
0x72: 0x00 (0x20)
0x73: 0x00 (0x38)
0x74: 0x00 (0x00)
0xb0: 0x00 (0x00)
0xb1: 0x00 (0x00)
0xb2: 0x00 (0x00)
0xb3: 0x00 (0x00)
0xb4: 0x00 (0x00)
0xb5: 0x00 (0x00)
0xb8: 0x00 (0x00)
0xb9: 0x00 (0x00)
0xba: 0x00 (0x00)
0xbb: 0x40 (0x00)
0xbc: 0x00 (0x00)
0xbd: 0x00 (0x00)
0xc0: 0x00 (0x01)
0xc1: 0xc7 (0x00)
0xc2: 0x80 (0x00)
0xc3: 0x01 (0x40)
0xc4: 0x0a (0x00)
0xc5: 0x00 (0x00)
0xc8: 0x00 (0x01)
0xc9: 0x04 (0x00)
0xca: 0x00 (0x00)
0xcb: 0x00 (0x40)
0xcc: 0x02 (0x00)
0xe0: 0x00 (0x00)
0xe1: 0x00 (0x00)
0xe2: 0x00 (0x00)
0xe3: 0x00 (0x00)
0xe4: 0x00 (0x00)
0xe5: 0x00 (0x00)
0xe6: 0x00 (0x00)
0xe7: 0x00 (0x00)
0xf0: 0x10 (0x00)
0xf1: 0x40 (0x00)
0xf2: 0x00 (0x00)
0xf3: 0x00 (0x00)
0xf4: 0x00 (0x00)
0xf5: 0x00 (0x00)
0xf6: 0x26 (0x00)
0xf7: 0x00 (0x00)
0xf8: 0x00 (0x00)
0xf9: 0x00 (0x00)
0xfa: 0x00 (0x00)
0xfb: 0x00 (0x00)
0xfc: 0x4a (NA)
0xfd: 0x00 (0x00)
0xfe: 0x00 (0x00)
0xff: 0x00 (0x00)
<...>
Environment controller (0x0295)
Register dump:
idx val def
0x00: 0x19 (0x18)
0x01: 0x00 (0x00)
0x02: 0xff (0x00)
0x03: 0x00 (0x00)
0x04: 0x00 (0x00)
0x05: 0x00 (0x00)
0x06: 0x00 (0x00)
0x07: 0x00 (0x00)
0x08: 0x00 (0x00)
0x09: 0x80 (0x80)
0x0a: 0x58 (0x40)
0x0b: 0x09 (0x09)
0x0c: 0x03 (0x00)
0x0d: 0x3f (NA)
0x0e: 0xbb (NA)
0x0f: 0x00 (NA)
0x10: 0xff (NA)
0x11: 0xff (NA)
0x12: 0xff (NA)
0x13: 0x34 (0x07)
0x14: 0xd3 (0x50)
0x15: 0x40 (MM)
0x16: 0x40 (MM)
0x17: 0x40 (MM)
0x18: 0x01 (NA)
0x19: 0x01 (NA)
0x1a: 0x00 (NA)
0x1b: 0xff (NA)
0x1c: 0xff (NA)
0x1d: 0xff (NA)
0x20: 0x42 (NA)
0x21: 0x77 (NA)
0x22: 0xd2 (NA)
0x23: 0xb7 (NA)
0x24: 0x1e (NA)
0x25: 0xff (NA)
0x26: 0xff (NA)
0x27: 0xc6 (NA)
0x28: 0xbf (NA)
0x29: 0xc9 (NA)
0x2a: 0xfe (NA)
0x2b: 0x2f (NA)
0x30: 0xff (NA)
0x31: 0x00 (NA)
0x32: 0xff (NA)
0x33: 0x00 (NA)
0x34: 0xff (NA)
0x35: 0x00 (NA)
0x36: 0xff (NA)
0x37: 0x00 (NA)
0x38: 0xff (NA)
0x39: 0x00 (NA)
0x3a: 0xff (NA)
0x3b: 0x00 (NA)
0x3c: 0xff (NA)
0x3d: 0x00 (NA)
0x3e: 0xff (NA)
0x3f: 0x00 (NA)
0x40: 0x7f (NA)
0x41: 0x00 (NA)
0x42: 0x7f (NA)
0x43: 0x00 (NA)
0x44: 0x7f (NA)
0x45: 0x00 (NA)
0x50: 0x9f (0x00)
0x51: 0x1c (0x00)
0x52: 0x7f (0x7f)
0x53: 0x7f (0x7f)
0x54: 0x7f (0x7f)
0x56: 0x00 (0x00)
0x57: 0x00 (0x00)
0x58: 0x90 (0x90)
0x59: 0x00 (0x00)
0x5b: 0x12 (0x12)
0x5c: 0xe0 (0x00)
0x5d: 0x00 (0x00)
0x5e: 0x00 (0x00)
0x5f: 0x00 (0x00)
0x60: 0x7f (0x7f)
0x61: 0x7f (0x7f)
0x62: 0x7f (0x7f)
0x63: 0x00 (0x00)
0x64: 0x00 (0x00)
0x65: 0x7f (0x7f)
0x68: 0x7f (0x7f)
0x69: 0x7f (0x7f)
0x6a: 0x7f (0x7f)
0x6b: 0x00 (0x00)
0x6c: 0x00 (0x00)
0x6d: 0x7f (0x7f)
0x70: 0x7f (0x7f)
0x71: 0x7f (0x7f)
0x72: 0x7f (0x7f)
0x73: 0x00 (0x00)
0x74: 0x00 (0x00)
0x75: 0x7f (0x7f)
0x80: 0x00 (NA)
0x81: 0x00 (NA)
0x82: 0x00 (NA)
0x83: 0x00 (NA)
0x88: 0x00 (0x00)
0x89: 0x00 (0x00)
0x8a: 0x00 (0x00)
0x8b: 0x00 (0x00)
0x8c: 0x00 (0x00)
0x8d: 0x00 (0x00)
0x8e: 0x02 (0x02)
0x8f: 0x00 (0x00)
0x90: 0xff (0xff)
0x91: 0x00 (0x00)
0x92: 0x00 (0x00)
0x94: 0xff (0xff)
0x95: 0x00 (0x00)
0x96: 0x00 (0x00)
0xa0: 0x00 (0x00)
0xa1: 0x00 (0x00)
0xa2: 0x00 (0x00)
0xa3: 0x00 (0x00)
0xa4: 0x00 (0x00)
0xa5: 0x00 (0x00)
0xa6: 0x00 (0x00)
BRAM (0x0000)'superiotool' util. ( F/W = Vendor - F9; Fan Control = SMART_AUTOMATIC; CPU Load = ~0% ) - Raw (unparsed) - output:
superiotool r4.10-140-gbba18c5540
Found ITE IT8718F (id=0x8718, rev=0x8) at 0x2e
Register dump:
idx val def
0x20: 0x87 (0x87)
0x21: 0x18 (0x18)
0x22: 0x08 (0x01)
0x23: 0x00 (0x00)
0x24: 0x00 (0x00)
0x2b: 0x00 (0x00)
<...>
LDN 0x04 (Environment controller)
idx val def
0x30: 0x01 (0x00)
0x60: 0x02 (0x02)
0x61: 0x90 (0x90)
0x62: 0x00 (0x02)
0x63: 0x00 (0x30)
0x70: 0x00 (0x09)
0xf0: 0x00 (0x00)
0xf1: 0x00 (0x00)
0xf2: 0x2a (0x00)
0xf3: 0x80 (0x00)
0xf4: 0x60 (0x00)
0xf5: 0x00 (NA)
0xf6: 0x00 (NA)
<...>
LDN 0x07 (GPIO)
idx val def
0x25: 0x00 (0x01)
0x26: 0xcf (0x00)
0x27: 0x80 (0x00)
0x28: 0x41 (0x40)
0x29: 0x0a (0x00)
0x2a: 0x00 (0x00)
0x2c: 0x01 (0x00)
0x60: 0x00 (0x00)
0x61: 0x00 (0x00)
0x62: 0x08 (0x00)
0x63: 0x00 (0x00)
0x64: 0x00 (0x00)
0x65: 0x00 (0x00)
0x70: 0x00 (0x00)
0x71: 0x00 (0x00)
0x72: 0x00 (0x20)
0x73: 0x00 (0x38)
0x74: 0x00 (0x00)
0xb0: 0x00 (0x00)
0xb1: 0x00 (0x00)
0xb2: 0x00 (0x00)
0xb3: 0x00 (0x00)
0xb4: 0x00 (0x00)
0xb5: 0x00 (0x00)
0xb8: 0x00 (0x00)
0xb9: 0x00 (0x00)
0xba: 0x00 (0x00)
0xbb: 0x40 (0x00)
0xbc: 0x00 (0x00)
0xbd: 0x00 (0x00)
0xc0: 0x00 (0x01)
0xc1: 0xcf (0x00)
0xc2: 0x80 (0x00)
0xc3: 0x01 (0x40)
0xc4: 0x0a (0x00)
0xc5: 0x00 (0x00)
0xc8: 0x00 (0x01)
0xc9: 0x04 (0x00)
0xca: 0x00 (0x00)
0xcb: 0x00 (0x40)
0xcc: 0x02 (0x00)
0xe0: 0x00 (0x00)
0xe1: 0x00 (0x00)
0xe2: 0x00 (0x00)
0xe3: 0x00 (0x00)
0xe4: 0x00 (0x00)
0xe5: 0x00 (0x00)
0xe6: 0x00 (0x00)
0xe7: 0x00 (0x00)
0xf0: 0x10 (0x00)
0xf1: 0x40 (0x00)
0xf2: 0x00 (0x00)
0xf3: 0x00 (0x00)
0xf4: 0x00 (0x00)
0xf5: 0x00 (0x00)
0xf6: 0x26 (0x00)
0xf7: 0x00 (0x00)
0xf8: 0x00 (0x00)
0xf9: 0x00 (0x00)
0xfa: 0x00 (0x00)
0xfb: 0x00 (0x00)
0xfc: 0x4a (NA)
0xfd: 0x00 (0x00)
0xfe: 0x00 (0x00)
0xff: 0x00 (0x00)
<...>
Environment controller (0x0295)
Register dump:
idx val def
0x00: 0x13 (0x18)
0x01: 0x00 (0x00)
0x02: 0x60 (0x00)
0x03: 0x00 (0x00)
0x04: 0xff (0x00)
0x05: 0xef (0x00)
0x06: 0x00 (0x00)
0x07: 0x37 (0x00)
0x08: 0xff (0x00)
0x09: 0x87 (0x80)
0x0a: 0x58 (0x40)
0x0b: 0x09 (0x09)
0x0c: 0x07 (0x00)
0x0d: 0x4c (NA)
0x0e: 0xbd (NA)
0x0f: 0x00 (NA)
0x10: 0xfe (NA)
0x11: 0xfe (NA)
0x12: 0xff (NA)
0x13: 0x36 (0x07)
0x14: 0xd7 (0x50)
0x15: 0xfe (MM)
0x16: 0x7f (MM)
0x17: 0xc2 (MM)
0x18: 0x01 (NA)
0x19: 0x01 (NA)
0x1a: 0x00 (NA)
0x1b: 0xff (NA)
0x1c: 0xff (NA)
0x1d: 0xff (NA)
0x20: 0x42 (NA)
0x21: 0x77 (NA)
0x22: 0xd1 (NA)
0x23: 0xb7 (NA)
0x24: 0x1e (NA)
0x25: 0xff (NA)
0x26: 0xff (NA)
0x27: 0xc6 (NA)
0x28: 0xbf (NA)
0x29: 0xc9 (NA)
0x2a: 0xfe (NA)
0x2b: 0x1d (NA)
0x30: 0xff (NA)
0x31: 0x00 (NA)
0x32: 0xff (NA)
0x33: 0x00 (NA)
0x34: 0xff (NA)
0x35: 0x00 (NA)
0x36: 0xff (NA)
0x37: 0x00 (NA)
0x38: 0x83 (NA)
0x39: 0x00 (NA)
0x3a: 0xff (NA)
0x3b: 0x00 (NA)
0x3c: 0xff (NA)
0x3d: 0x00 (NA)
0x3e: 0xff (NA)
0x3f: 0x00 (NA)
0x40: 0x7f (NA)
0x41: 0x7f (NA)
0x42: 0x7f (NA)
0x43: 0x7f (NA)
0x44: 0x46 (NA)
0x45: 0x7f (NA)
0x50: 0x9f (0x00)
0x51: 0x1c (0x00)
0x52: 0x7f (0x7f)
0x53: 0x7f (0x7f)
0x54: 0x46 (0x7f)
0x56: 0xf6 (0x00)
0x57: 0xf6 (0x00)
0x58: 0x90 (0x90)
0x59: 0xf6 (0x00)
0x5b: 0x12 (0x12)
0x5c: 0x65 (0x00)
0x5d: 0x00 (0x00)
0x5e: 0x00 (0x00)
0x5f: 0x00 (0x00)
0x60: 0x00 (0x7f)
0x61: 0x14 (0x7f)
0x62: 0x41 (0x7f)
0x63: 0x23 (0x00)
0x64: 0x90 (0x00)
0x65: 0x03 (0x7f)
0x68: 0x7f (0x7f)
0x69: 0x7f (0x7f)
0x6a: 0x7f (0x7f)
0x6b: 0x00 (0x00)
0x6c: 0x00 (0x00)
0x6d: 0x7f (0x7f)
0x70: 0x00 (0x7f)
0x71: 0x14 (0x7f)
0x72: 0x41 (0x7f)
0x73: 0x23 (0x00)
0x74: 0x90 (0x00)
0x75: 0x03 (0x7f)
0x80: 0x00 (NA)
0x81: 0x00 (NA)
0x82: 0x00 (NA)
0x83: 0x00 (NA)
0x88: 0x00 (0x00)
0x89: 0x00 (0x00)
0x8a: 0x00 (0x00)
0x8b: 0x00 (0x00)
0x8c: 0x00 (0x00)
0x8d: 0x00 (0x00)
0x8e: 0x02 (0x02)
0x8f: 0x00 (0x00)
0x90: 0xff (0xff)
0x91: 0x00 (0x00)
0x92: 0x00 (0x00)
0x94: 0xff (0xff)
0x95: 0x00 (0x00)
0x96: 0x00 (0x00)
0xa0: 0x00 (0x00)
0xa1: 0x00 (0x00)
0xa2: 0x00 (0x00)
0xa3: 0x00 (0x00)
0xa4: 0x00 (0x00)
0xa5: 0x00 (0x00)
0xa6: 0x00 (0x00)
BRAM (0x0000)'superiotool' util. ( F/W = Vendor - F9; Fan Control = SMART_AUTOMATIC; CPU Load = ~100% ) - Raw (unparsed) - output:
Found ITE IT8718F (id=0x8718, rev=0x8) at 0x2e
Register dump:
idx val def
0x20: 0x87 (0x87)
0x21: 0x18 (0x18)
0x22: 0x08 (0x01)
0x23: 0x00 (0x00)
0x24: 0x00 (0x00)
0x2b: 0x00 (0x00)
<...>
LDN 0x04 (Environment controller)
idx val def
0x30: 0x01 (0x00)
0x60: 0x02 (0x02)
0x61: 0x90 (0x90)
0x62: 0x00 (0x02)
0x63: 0x00 (0x30)
0x70: 0x00 (0x09)
0xf0: 0x00 (0x00)
0xf1: 0x00 (0x00)
0xf2: 0x2a (0x00)
0xf3: 0x80 (0x00)
0xf4: 0x60 (0x00)
0xf5: 0x00 (NA)
0xf6: 0x00 (NA)
<...>
LDN 0x07 (GPIO)
idx val def
0x25: 0x00 (0x01)
0x26: 0xcf (0x00)
0x27: 0x80 (0x00)
0x28: 0x41 (0x40)
0x29: 0x0a (0x00)
0x2a: 0x00 (0x00)
0x2c: 0x01 (0x00)
0x60: 0x00 (0x00)
0x61: 0x00 (0x00)
0x62: 0x08 (0x00)
0x63: 0x00 (0x00)
0x64: 0x00 (0x00)
0x65: 0x00 (0x00)
0x70: 0x00 (0x00)
0x71: 0x00 (0x00)
0x72: 0x00 (0x20)
0x73: 0x00 (0x38)
0x74: 0x00 (0x00)
0xb0: 0x00 (0x00)
0xb1: 0x00 (0x00)
0xb2: 0x00 (0x00)
0xb3: 0x00 (0x00)
0xb4: 0x00 (0x00)
0xb5: 0x00 (0x00)
0xb8: 0x00 (0x00)
0xb9: 0x00 (0x00)
0xba: 0x00 (0x00)
0xbb: 0x40 (0x00)
0xbc: 0x00 (0x00)
0xbd: 0x00 (0x00)
0xc0: 0x00 (0x01)
0xc1: 0xcf (0x00)
0xc2: 0x80 (0x00)
0xc3: 0x01 (0x40)
0xc4: 0x0a (0x00)
0xc5: 0x00 (0x00)
0xc8: 0x00 (0x01)
0xc9: 0x04 (0x00)
0xca: 0x00 (0x00)
0xcb: 0x00 (0x40)
0xcc: 0x02 (0x00)
0xe0: 0x00 (0x00)
0xe1: 0x00 (0x00)
0xe2: 0x00 (0x00)
0xe3: 0x00 (0x00)
0xe4: 0x00 (0x00)
0xe5: 0x00 (0x00)
0xe6: 0x00 (0x00)
0xe7: 0x00 (0x00)
0xf0: 0x10 (0x00)
0xf1: 0x40 (0x00)
0xf2: 0x00 (0x00)
0xf3: 0x00 (0x00)
0xf4: 0x00 (0x00)
0xf5: 0x00 (0x00)
0xf6: 0x26 (0x00)
0xf7: 0x00 (0x00)
0xf8: 0x00 (0x00)
0xf9: 0x00 (0x00)
0xfa: 0x00 (0x00)
0xfb: 0x00 (0x00)
0xfc: 0x4a (NA)
0xfd: 0x00 (0x00)
0xfe: 0x00 (0x00)
0xff: 0x00 (0x00)
<...>
Environment controller (0x0295)
Register dump:
idx val def
0x00: 0x13 (0x18)
0x01: 0x00 (0x00)
0x02: 0x60 (0x00)
0x03: 0x00 (0x00)
0x04: 0xff (0x00)
0x05: 0xef (0x00)
0x06: 0x00 (0x00)
0x07: 0x37 (0x00)
0x08: 0xff (0x00)
0x09: 0x87 (0x80)
0x0a: 0x58 (0x40)
0x0b: 0x09 (0x09)
0x0c: 0x07 (0x00)
0x0d: 0x15 (NA)
0x0e: 0xc0 (NA)
0x0f: 0x00 (NA)
0x10: 0xfe (NA)
0x11: 0xfe (NA)
0x12: 0xff (NA)
0x13: 0x36 (0x07)
0x14: 0xd7 (0x50)
0x15: 0xfe (MM)
0x16: 0x7f (MM)
0x17: 0xc2 (MM)
0x18: 0x01 (NA)
0x19: 0x01 (NA)
0x1a: 0x00 (NA)
0x1b: 0xff (NA)
0x1c: 0xff (NA)
0x1d: 0xff (NA)
0x20: 0x44 (NA)
0x21: 0x77 (NA)
0x22: 0xd1 (NA)
0x23: 0xb8 (NA)
0x24: 0x48 (NA)
0x25: 0xff (NA)
0x26: 0xff (NA)
0x27: 0xc5 (NA)
0x28: 0xbf (NA)
0x29: 0xc9 (NA)
0x2a: 0xfe (NA)
0x2b: 0x2e (NA)
0x30: 0xff (NA)
0x31: 0x00 (NA)
0x32: 0xff (NA)
0x33: 0x00 (NA)
0x34: 0xff (NA)
0x35: 0x00 (NA)
0x36: 0xff (NA)
0x37: 0x00 (NA)
0x38: 0x83 (NA)
0x39: 0x00 (NA)
0x3a: 0xff (NA)
0x3b: 0x00 (NA)
0x3c: 0xff (NA)
0x3d: 0x00 (NA)
0x3e: 0xff (NA)
0x3f: 0x00 (NA)
0x40: 0x7f (NA)
0x41: 0x7f (NA)
0x42: 0x7f (NA)
0x43: 0x7f (NA)
0x44: 0x46 (NA)
0x45: 0x7f (NA)
0x50: 0x9f (0x00)
0x51: 0x1c (0x00)
0x52: 0x7f (0x7f)
0x53: 0x7f (0x7f)
0x54: 0x46 (0x7f)
0x56: 0xf6 (0x00)
0x57: 0xf6 (0x00)
0x58: 0x90 (0x90)
0x59: 0xf6 (0x00)
0x5b: 0x12 (0x12)
0x5c: 0x65 (0x00)
0x5d: 0x00 (0x00)
0x5e: 0x00 (0x00)
0x5f: 0x00 (0x00)
0x60: 0x00 (0x7f)
0x61: 0x14 (0x7f)
0x62: 0x41 (0x7f)
0x63: 0x23 (0x00)
0x64: 0x90 (0x00)
0x65: 0x03 (0x7f)
0x68: 0x7f (0x7f)
0x69: 0x7f (0x7f)
0x6a: 0x7f (0x7f)
0x6b: 0x00 (0x00)
0x6c: 0x00 (0x00)
0x6d: 0x7f (0x7f)
0x70: 0x00 (0x7f)
0x71: 0x14 (0x7f)
0x72: 0x41 (0x7f)
0x73: 0x23 (0x00)
0x74: 0x90 (0x00)
0x75: 0x03 (0x7f)
0x80: 0x00 (NA)
0x81: 0x00 (NA)
0x82: 0x00 (NA)
0x83: 0x00 (NA)
0x88: 0x00 (0x00)
0x89: 0x00 (0x00)
0x8a: 0x00 (0x00)
0x8b: 0x00 (0x00)
0x8c: 0x00 (0x00)
0x8d: 0x00 (0x00)
0x8e: 0x02 (0x02)
0x8f: 0x00 (0x00)
0x90: 0xff (0xff)
0x91: 0x00 (0x00)
0x92: 0x00 (0x00)
0x94: 0xff (0xff)
0x95: 0x00 (0x00)
0x96: 0x00 (0x00)
0xa0: 0x00 (0x00)
0xa1: 0x00 (0x00)
0xa2: 0x00 (0x00)
0xa3: 0x00 (0x00)
0xa4: 0x00 (0x00)
0xa5: 0x00 (0x00)
0xa6: 0x00 (0x00)
BRAM (0x0000)'superiotool' util. ( F/W = Vendor - F9; Fan Control = Always ON ) - Raw (unparsed) - output:
Found ITE IT8718F (id=0x8718, rev=0x8) at 0x2e
Register dump:
idx val def
0x20: 0x87 (0x87)
0x21: 0x18 (0x18)
0x22: 0x08 (0x01)
0x23: 0x00 (0x00)
0x24: 0x00 (0x00)
0x2b: 0x00 (0x00)
<...>
LDN 0x04 (Environment controller)
idx val def
0x30: 0x01 (0x00)
0x60: 0x02 (0x02)
0x61: 0x90 (0x90)
0x62: 0x00 (0x02)
0x63: 0x00 (0x30)
0x70: 0x00 (0x09)
0xf0: 0x80 (0x00)
0xf1: 0x00 (0x00)
0xf2: 0x2a (0x00)
0xf3: 0x80 (0x00)
0xf4: 0x60 (0x00)
0xf5: 0x00 (NA)
0xf6: 0x00 (NA)
<...>
LDN 0x07 (GPIO)
idx val def
0x25: 0x00 (0x01)
0x26: 0xcf (0x00)
0x27: 0x80 (0x00)
0x28: 0x41 (0x40)
0x29: 0x0a (0x00)
0x2a: 0x00 (0x00)
0x2c: 0x01 (0x00)
0x60: 0x00 (0x00)
0x61: 0x00 (0x00)
0x62: 0x08 (0x00)
0x63: 0x00 (0x00)
0x64: 0x00 (0x00)
0x65: 0x00 (0x00)
0x70: 0x00 (0x00)
0x71: 0x00 (0x00)
0x72: 0x00 (0x20)
0x73: 0x00 (0x38)
0x74: 0x00 (0x00)
0xb0: 0x00 (0x00)
0xb1: 0x00 (0x00)
0xb2: 0x00 (0x00)
0xb3: 0x00 (0x00)
0xb4: 0x00 (0x00)
0xb5: 0x00 (0x00)
0xb8: 0x00 (0x00)
0xb9: 0x00 (0x00)
0xba: 0x00 (0x00)
0xbb: 0x40 (0x00)
0xbc: 0x00 (0x00)
0xbd: 0x00 (0x00)
0xc0: 0x00 (0x01)
0xc1: 0xcf (0x00)
0xc2: 0x80 (0x00)
0xc3: 0x01 (0x40)
0xc4: 0x0a (0x00)
0xc5: 0x00 (0x00)
0xc8: 0x00 (0x01)
0xc9: 0x04 (0x00)
0xca: 0x00 (0x00)
0xcb: 0x00 (0x40)
0xcc: 0x02 (0x00)
0xe0: 0x00 (0x00)
0xe1: 0x00 (0x00)
0xe2: 0x00 (0x00)
0xe3: 0x00 (0x00)
0xe4: 0x00 (0x00)
0xe5: 0x00 (0x00)
0xe6: 0x00 (0x00)
0xe7: 0x00 (0x00)
0xf0: 0x10 (0x00)
0xf1: 0x40 (0x00)
0xf2: 0x00 (0x00)
0xf3: 0x00 (0x00)
0xf4: 0x00 (0x00)
0xf5: 0x00 (0x00)
0xf6: 0x26 (0x00)
0xf7: 0x00 (0x00)
0xf8: 0x00 (0x00)
0xf9: 0x00 (0x00)
0xfa: 0x00 (0x00)
0xfb: 0x00 (0x00)
0xfc: 0x4a (NA)
0xfd: 0x00 (0x00)
0xfe: 0x00 (0x00)
0xff: 0x00 (0x00)
<...>
Environment controller (0x0295)
Register dump:
idx val def
0x00: 0x13 (0x18)
0x01: 0x00 (0x00)
0x02: 0x60 (0x00)
0x03: 0x00 (0x00)
0x04: 0xff (0x00)
0x05: 0xef (0x00)
0x06: 0x00 (0x00)
0x07: 0x37 (0x00)
0x08: 0xff (0x00)
0x09: 0x87 (0x80)
0x0a: 0x58 (0x40)
0x0b: 0x09 (0x09)
0x0c: 0x07 (0x00)
0x0d: 0xe1 (NA)
0x0e: 0xbe (NA)
0x0f: 0xff (NA)
0x10: 0xfe (NA)
0x11: 0xfe (NA)
0x12: 0xff (NA)
0x13: 0x72 (0x07)
0x14: 0xd7 (0x50)
0x15: 0xfe (MM)
0x16: 0x7f (MM)
0x17: 0xc2 (MM)
0x18: 0x00 (NA)
0x19: 0x01 (NA)
0x1a: 0xff (NA)
0x1b: 0xff (NA)
0x1c: 0xff (NA)
0x1d: 0xff (NA)
0x20: 0x42 (NA)
0x21: 0x77 (NA)
0x22: 0xd2 (NA)
0x23: 0xb7 (NA)
0x24: 0x1e (NA)
0x25: 0xff (NA)
0x26: 0xff (NA)
0x27: 0xc6 (NA)
0x28: 0xbf (NA)
0x29: 0xc9 (NA)
0x2a: 0xfe (NA)
0x2b: 0x1d (NA)
0x30: 0xff (NA)
0x31: 0x00 (NA)
0x32: 0xff (NA)
0x33: 0x00 (NA)
0x34: 0xff (NA)
0x35: 0x00 (NA)
0x36: 0xff (NA)
0x37: 0x00 (NA)
0x38: 0x83 (NA)
0x39: 0x00 (NA)
0x3a: 0xff (NA)
0x3b: 0x00 (NA)
0x3c: 0xff (NA)
0x3d: 0x00 (NA)
0x3e: 0xff (NA)
0x3f: 0x00 (NA)
0x40: 0x7f (NA)
0x41: 0x7f (NA)
0x42: 0x7f (NA)
0x43: 0x7f (NA)
0x44: 0x46 (NA)
0x45: 0x7f (NA)
0x50: 0x9f (0x00)
0x51: 0x1c (0x00)
0x52: 0x7f (0x7f)
0x53: 0x7f (0x7f)
0x54: 0x46 (0x7f)
0x56: 0xf6 (0x00)
0x57: 0xf6 (0x00)
0x58: 0x90 (0x90)
0x59: 0xf6 (0x00)
0x5b: 0x12 (0x12)
0x5c: 0x65 (0x00)
0x5d: 0x00 (0x00)
0x5e: 0x00 (0x00)
0x5f: 0x00 (0x00)
0x60: 0x00 (0x7f)
0x61: 0x14 (0x7f)
0x62: 0x41 (0x7f)
0x63: 0x23 (0x00)
0x64: 0x90 (0x00)
0x65: 0x03 (0x7f)
0x68: 0x7f (0x7f)
0x69: 0x7f (0x7f)
0x6a: 0x7f (0x7f)
0x6b: 0x00 (0x00)
0x6c: 0x00 (0x00)
0x6d: 0x7f (0x7f)
0x70: 0x00 (0x7f)
0x71: 0x14 (0x7f)
0x72: 0x41 (0x7f)
0x73: 0x23 (0x00)
0x74: 0x90 (0x00)
0x75: 0x03 (0x7f)
0x80: 0x00 (NA)
0x81: 0x00 (NA)
0x82: 0x00 (NA)
0x83: 0x00 (NA)
0x88: 0x00 (0x00)
0x89: 0x00 (0x00)
0x8a: 0x00 (0x00)
0x8b: 0x00 (0x00)
0x8c: 0x00 (0x00)
0x8d: 0x00 (0x00)
0x8e: 0x02 (0x02)
0x8f: 0x00 (0x00)
0x90: 0xff (0xff)
0x91: 0x00 (0x00)
0x92: 0x00 (0x00)
0x94: 0xff (0xff)
0x95: 0x00 (0x00)
0x96: 0x00 (0x00)
0xa0: 0x00 (0x00)
0xa1: 0x00 (0x00)
0xa2: 0x00 (0x00)
0xa3: 0x00 (0x00)
0xa4: 0x00 (0x00)
0xa5: 0x00 (0x00)
0xa6: 0x00 (0x00)
BRAM (0x0000)I'm glad you provided the raw output of superiotool, it seems your dumps of the decompiled bincfg are incorrect, you are not supposed to pass the ascii output of superiotool into the bincfg, it needs to be a binary representation of just the environment controller section. But its okay, don't need to redump I am likely to figure it out from what you have provided. Thanks.
mzcs
commented
5 years ago Don't be silly, I can re-dump it all very easily ! :)
& To make sure I do it right this time, may you kindly confirm that the 'superiotool' util. output section & form that I use are correct ? (or otherwise guide me with instructions as per the correct way of operation)
Here's a sample of the 'Environment controller (0x0295)' section in it :
idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 20 21 22 23 24 25 26 27 28 29 2a 2b 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 50 51 52 53 54 56 57 58 59 5b 5c 5d 5e 5f 60 61 62 63 64 65 68 69 6a 6b 6c 6d 70 71 72 73 74 75 80 81 82 83 88 89 8a 8b 8c 8d 8e 8f 90 91 92 94 95 96 a0 a1 a2 a3 a4 a5 a6
val 19 00 60 00 00 00 00 00 00 80 58 09 03 40 bd 00 ff ff ff 34 d3 40 40 40 01 01 00 ff ff ff 43 77 d2 b7 1e ff ff c6 bf c9 fe 2e ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 7f 00 7f 00 7f 00 9f 1c 7f 7f 7f 00 00 90 00 12 e0 00 00 00 7f 7f 7f 00 00 7f 7f 7f 7f 00 00 7f 7f 7f 7f 00 00 7f 00 00 00 00 00 00 00 00 00 00 02 00 ff 00 00 ff 00 00 00 00 00 00 00 00 00bincfg processes binary files, not ascii representations of binary. So you would need to have a file such that when you hexdump it, you get the environment controller section.
Something like this:
echo "00000000: 1900600000000000008058..." | xxd -r > output.bin
Then check that the file contains the correct binary:
hexdump -C output.bin
Then when you have the right binary, decompile it with bincfg:
bincfg -d it8718-ec.spec output.bin ec.parsed
zamaudio
commented
5 years ago Here is the diff of my coreboot versus your vendor ECRAM section for FAN_CONTROL_AUTOMATIC setting
--- cb.parsed 2019-08-03 16:04:11.836181086 +1000
+++ vendor.parsed 2019-08-03 16:04:04.130206644 +1000
@@ -4 +4 @@
- "conf00_smien" = 0x0,
+ "conf00_smien" = 0x1,
@@ -6 +6 @@
- "conf00_irqclr" = 0x1,
+ "conf00_irqclr" = 0x0,
@@ -15 +15 @@
- "irq1_copen" = 0x1,
+ "irq1_copen" = 0x0,
@@ -19,5 +19,5 @@
- "irq2_limit_vin0" = 0x1,
- "irq2_limit_vin1" = 0x1,
- "irq2_limit_vin2" = 0x1,
- "irq2_limit_vin3" = 0x1,
- "irq2_limit_vin4" = 0x1,
+ "irq2_limit_vin0" = 0x0,
+ "irq2_limit_vin1" = 0x0,
+ "irq2_limit_vin2" = 0x0,
+ "irq2_limit_vin3" = 0x0,
+ "irq2_limit_vin4" = 0x0,
@@ -26 +26 @@
- "irq2_limit_vin7" = 0x1,
+ "irq2_limit_vin7" = 0x0,
@@ -31,12 +31,12 @@
- "smi1_dis_fantac1" = 0x0,
- "smi1_dis_fantac2" = 0x0,
- "smi1_dis_fantac3" = 0x0,
- "smi1_dis_fantac4" = 0x0,
- "smi1_dis_copen" = 0x0,
- "smi1_reserved0" = 0x0,
- "smi1_dis_fantac5" = 0x0,
- "smi1_reserved1" = 0x0,
- "smi2_dis_vin0" = 0x0,
- "smi2_dis_vin1" = 0x0,
- "smi2_dis_vin2" = 0x0,
- "smi2_dis_vin3" = 0x0,
+ "smi1_dis_fantac1" = 0x1,
+ "smi1_dis_fantac2" = 0x1,
+ "smi1_dis_fantac3" = 0x1,
+ "smi1_dis_fantac4" = 0x1,
+ "smi1_dis_copen" = 0x1,
+ "smi1_reserved0" = 0x1,
+ "smi1_dis_fantac5" = 0x1,
+ "smi1_reserved1" = 0x1,
+ "smi2_dis_vin0" = 0x1,
+ "smi2_dis_vin1" = 0x1,
+ "smi2_dis_vin2" = 0x1,
+ "smi2_dis_vin3" = 0x1,
@@ -44,3 +44,3 @@
- "smi2_dis_vin5" = 0x0,
- "smi2_dis_vin6" = 0x0,
- "smi2_dis_vin7" = 0x0,
+ "smi2_dis_vin5" = 0x1,
+ "smi2_dis_vin6" = 0x1,
+ "smi2_dis_vin7" = 0x1,
@@ -51,3 +51,3 @@
- "irqmask1_fantac1" = 0x0,
- "irqmask1_fantac2" = 0x0,
- "irqmask1_fantac3" = 0x0,
+ "irqmask1_fantac1" = 0x1,
+ "irqmask1_fantac2" = 0x1,
+ "irqmask1_fantac3" = 0x1,
@@ -55,2 +55,2 @@
- "irqmask1_copen" = 0x0,
- "irqmask1_reserved0" = 0x0,
+ "irqmask1_copen" = 0x1,
+ "irqmask1_reserved0" = 0x1,
@@ -59,11 +59,11 @@
- "irqmask2_vin0" = 0x0,
- "irqmask2_vin1" = 0x0,
- "irqmask2_vin2" = 0x0,
- "irqmask2_vin3" = 0x0,
- "irqmask2_vin4" = 0x0,
- "irqmask2_vin5" = 0x0,
- "irqmask2_vin6" = 0x0,
- "irqmask2_vin7" = 0x0,
- "irqmask3_temp1" = 0x0,
- "irqmask3_temp2" = 0x0,
- "irqmask3_temp3" = 0x0,
+ "irqmask2_vin0" = 0x1,
+ "irqmask2_vin1" = 0x1,
+ "irqmask2_vin2" = 0x1,
+ "irqmask2_vin3" = 0x1,
+ "irqmask2_vin4" = 0x1,
+ "irqmask2_vin5" = 0x1,
+ "irqmask2_vin6" = 0x1,
+ "irqmask2_vin7" = 0x1,
+ "irqmask3_temp1" = 0x1,
+ "irqmask3_temp2" = 0x1,
+ "irqmask3_temp3" = 0x1,
@@ -72 +72 @@
- "iface_reserved" = 0x4,
+ "iface_reserved" = 0x8,
@@ -79 +79 @@
- "fantach16_en_tac3" = 0x0,
+ "fantach16_en_tac3" = 0x1,
@@ -85,2 +85,2 @@
- "fantach_lo_counts1" = 0xd6,
- "fantach_lo_counts2" = 0xff,
+ "fantach_lo_counts1" = 0x4c,
+ "fantach_lo_counts2" = 0xbd,
@@ -88,2 +88,2 @@
- "fantach_lo_limit1" = 0xff,
- "fantach_lo_limit2" = 0xff,
+ "fantach_lo_limit1" = 0xfe,
+ "fantach_lo_limit2" = 0xfe,
@@ -91 +91 @@
- "fanctlmain_mode1" = 0x1,
+ "fanctlmain_mode1" = 0x0,
@@ -99,3 +99,3 @@
- "fanctl_enable1" = 0x0,
- "fanctl_enable2" = 0x0,
- "fanctl_enable3" = 0x0,
+ "fanctl_enable1" = 0x1,
+ "fanctl_enable2" = 0x1,
+ "fanctl_enable3" = 0x1,
@@ -106 +106 @@
- "fanctl1_steps" = 0x0,
+ "fanctl1_steps" = 0x1f,
@@ -108,4 +108,4 @@
- "fanctl2_tmpin_sel" = 0x2,
- "fanctl2_steps" = 0x0,
- "fanctl2_pwm_mode" = 0x1,
- "fanctl3_tmpin_sel" = 0x0,
+ "fanctl2_tmpin_sel" = 0x3,
+ "fanctl2_steps" = 0x1f,
+ "fanctl2_pwm_mode" = 0x0,
+ "fanctl3_tmpin_sel" = 0x2,
@@ -113 +113 @@
- "fanctl3_pwm_mode" = 0x0,
+ "fanctl3_pwm_mode" = 0x1,
@@ -115 +115 @@
- "fantach_hi_counts2" = 0xff,
+ "fantach_hi_counts2" = 0x1,
@@ -120,5 +120,5 @@
- "reserved1e" = 0x4c,
- "reserved1f" = 0x76,
- "vin0" = 0xd0,
- "vin1" = 0xbb,
- "vin2" = 0x13,
+ "reserved1e" = 0x42,
+ "reserved1f" = 0x77,
+ "vin0" = 0xd1,
+ "vin1" = 0xb7,
+ "vin2" = 0x1e,
@@ -127,2 +127,2 @@
- "vin5" = 0xc0,
- "vin6" = 0xc6,
+ "vin5" = 0xc6,
+ "vin6" = 0xbf,
@@ -131 +131 @@
- "tmpin1" = 0x24,
+ "tmpin1" = 0x1d,
@@ -133 +133 @@
- "tmpin3" = 0xff,
+ "tmpin3" = 0x0,
@@ -135 +135 @@
- "reserved2d" = 0xff,
+ "reserved2d" = 0x0,
@@ -137 +137 @@
- "reserved2f" = 0xff,
+ "reserved2f" = 0x0,
@@ -139,3 +139,3 @@
- "limit_lo_vin0" = 0xff,
- "limit_hi_vin1" = 0xff,
- "limit_lo_vin1" = 0xff,
+ "limit_lo_vin0" = 0x0,
+ "limit_hi_vin1" = 0x83,
+ "limit_lo_vin1" = 0x0,
@@ -143 +143 @@
- "limit_lo_vin2" = 0xff,
+ "limit_lo_vin2" = 0x0,
@@ -145 +145 @@
- "limit_lo_vin3" = 0xff,
+ "limit_lo_vin3" = 0x0,
@@ -147 +147 @@
- "limit_lo_vin4" = 0xff,
+ "limit_lo_vin4" = 0x0,
@@ -149 +149 @@
- "limit_lo_vin5" = 0x0,
+ "limit_lo_vin5" = 0x7f,
@@ -151,3 +151,3 @@
- "limit_lo_vin6" = 0x0,
- "limit_hi_vin7" = 0x7f,
- "limit_lo_vin7" = 0x0,
+ "limit_lo_vin6" = 0x7f,
+ "limit_hi_vin7" = 0x46,
+ "limit_lo_vin7" = 0x7f,
@@ -158,3 +158,3 @@
- "limit_hi_tmpin3" = 0x7f,
- "limit_lo_tmpin3" = 0x0,
- "reserved46" = 0x0,
+ "limit_hi_tmpin3" = 0x46,
+ "limit_lo_tmpin3" = 0xf6,
+ "reserved46" = 0xf6,
@@ -162 +162 @@
- "reserved48" = 0x0,
+ "reserved48" = 0xf6,
@@ -164 +164 @@
- "reserved4a" = 0xe0,
+ "reserved4a" = 0x65,
@@ -168,2 +168,2 @@
- "reserved4e" = 0x19,
- "reserved4f" = 0x1e,
+ "reserved4e" = 0x0,
+ "reserved4f" = 0x14,
@@ -178,2 +178,2 @@
- "therm_diode_tmpin1" = 0x0,
- "therm_diode_tmpin2" = 0x0,
+ "therm_diode_tmpin1" = 0x1,
+ "therm_diode_tmpin2" = 0x1,
@@ -183 +183 @@
- "therm_resistor_tmpin3" = 0x0,
+ "therm_resistor_tmpin3" = 0x1,
@@ -185 +185 @@
- "therm_limit_tmpin1" = 0x8a,
+ "therm_limit_tmpin1" = 0x90,
@@ -187,2 +187,2 @@
- "therm_limit_tmpin3" = 0x19,
- "therm_resistor_vin4" = 0x0,
+ "therm_limit_tmpin3" = 0x7f,
+ "therm_resistor_vin4" = 0x1,
@@ -192 +192 @@
- "adc_fanctl2_pwm_bclk" = 0x1,
+ "adc_fanctl2_pwm_bclk" = 0x7,
@@ -194 +194 @@
- "thermal_zero_diode1" = 0x41,
+ "thermal_zero_diode1" = 0x7f,
@@ -196,4 +196,4 @@
- "ite_vendor_id" = 0x8a,
- "thermal_zero_diode3" = 0x3,
- "reserved5a" = 0x7f,
- "ite_code_id" = 0x7f,
+ "ite_vendor_id" = 0x0,
+ "thermal_zero_diode3" = 0x7f,
+ "reserved5a" = 0x0,
+ "ite_code_id" = 0x14,
@@ -201,4 +201,4 @@
- "beep_vin" = 0x1,
- "beep_tmpin" = 0x1,
- "beep_reserved" = 0x1,
- "adc_clock_select" = 0x7,
+ "beep_vin" = 0x0,
+ "beep_tmpin" = 0x0,
+ "beep_reserved" = 0x0,
+ "adc_clock_select" = 0x4,
@@ -206,2 +206,2 @@
- "beep_fan_freq_div" = 0x0,
- "beep_fan_tone_div" = 0x0,
+ "beep_fan_freq_div" = 0x3,
+ "beep_fan_tone_div" = 0x2,
@@ -209,3 +209,3 @@
- "beep_volt_tone_div" = 0x0,
- "beep_temp_freq_div" = 0xf,
- "beep_temp_tone_div" = 0x7,
+ "beep_volt_tone_div" = 0x9,
+ "beep_temp_freq_div" = 0x3,
+ "beep_temp_tone_div" = 0x0,I used the following toolchain/parameter combination for the conversion:
echo "19 00 60 00 00 00 00 00 00 80 58 09 03 40 bd 00 ff ff ff 34 d3 40 40 40 01 01 00 ff ff ff 43 77 d2 b7 1e ff ff c6 bf c9 fe 2d ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 ff 00 7f 00 7f 00 7f 00 9f 1c 7f 7f 7f 00 00 90 00 12 e0 00 00 00 7f 7f 7f 00 00 7f 7f 7f 7f 00 00 7f 7f 7f 7f 00 00 7f 00 00 00 00 00 00 00 00 00 00 02 00 ff 00 00 ff 00 00 00 00 00 00 00 00 00" | sed 's/ /\n/g' - | xxd -r -ps - > output.bin@zamaudio: I did a re-dump of the whole shebang & updated my respective post. Thanks Again For Your Willingness To Assist ! :)
zamaudio
commented
5 years ago I think I have a working rom with fan control but there was a bug in coreboot that prevents me from flashing internally with this rom. I have built a new rom with the SPI bug fixed and with my fan control change, but I don't have time to recover my board right now to test. @mzcs You are welcome to try this rom if you like and tell me if the fan is working or not: g41m-coreboot-seabios-20190803-tryfixfan.rom.gz
mzcs
commented
5 years ago May You Kindly Build That Test Coreboot F/W w/ The Attached 'Intel Microcode' Archive ? (Otherwise My System Might Not Complete POST...) cpu_microcode_blob.bin.gz
mzcs
commented
5 years ago Also, May You Please Post The Changeset as a Patch (or a mere archive - a .tar.gz or otherwise)... ?
zamaudio
commented
5 years ago Good call, it would be better if you compile your own rom with this change, but I'm not sure if its working yet:
commit 1f437451d5e2e80889620f9fd9ed06b9b49e9eb5
Author: Damien Zammit <damien@zamaudio.com>
Date: Sat Aug 3 00:09:28 2019 +1000
gigabyte/ga-g41m-es2l: WIP Fix fan control
Previously, fan would spin at constant speed.
This change fixes the automatic fan control. (does it?)
Change-Id: I8f0ce3e89da01f3a65d6f7b10b3c1482040dfe48
Signed-off-by: Damien Zammit <damien@zamaudio.com>
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
index 7045dbf8e1..19556e87aa 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
@@ -82,11 +82,19 @@ chip northbridge/intel/x4x # Northbridge
device pci 1f.0 on # ISA bridge
subsystemid 0x1458 0x5001
chip superio/ite/it8718f # Super I/O
- register "TMPIN1.mode" = "THERMAL_RESISTOR"
- register "TMPIN2.mode" = "THERMAL_RESISTOR"
- register "TMPIN3.mode" = "THERMAL_DIODE"
- register "TMPIN3.offset" = "0"
- register "ec.vin_mask" = "VIN7 | VIN4 | VIN3 | VIN2 | VIN1 | VIN0"
+ register "TMPIN1.mode" = "THERMAL_DIODE"
+ register "TMPIN1.offset" = "127"
+ register "TMPIN1.min" = "28"
+ register "TMPIN1.max" = "100"
+ register "TMPIN2.mode" = "THERMAL_DIODE"
+ register "TMPIN2.offset" = "0"
+ register "TMPIN2.min" = "127"
+ register "TMPIN2.max" = "127"
+ register "TMPIN3.mode" = "THERMAL_RESISTOR"
+ register "TMPIN3.offset" = "127"
+ register "TMPIN3.min" = "33"
+ register "TMPIN3.max" = "70"
+ register "ec.vin_mask" = "VIN6 | VIN0"
register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
register "FAN1.smart.tmpin" = "3"
@@ -134,13 +142,6 @@ chip northbridge/intel/x4x # Northbridge
io 0x60 = 0x290
irq 0x70 = 0x00
io 0x62 = 0x000
- irq 0xf0 = 0x80
- irq 0xf1 = 0x00
- irq 0xf2 = 0x0a
- irq 0xf3 = 0x80
- irq 0xf4 = 0x00
- irq 0xf5 = 0x00
- irq 0xf6 = 0xff
end
device pnp 2e.5 on # Keyboard
io 0x60 = 0x60
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
index e20fb7a888..cc9fee2021 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
@@ -52,7 +52,7 @@ static void mb_gpio_init(void)
/* Set default GPIOs on superio */
ite_reg_write(GPIO_DEV, 0x25, 0x00);
- ite_reg_write(GPIO_DEV, 0x26, 0xc7);
+ ite_reg_write(GPIO_DEV, 0x26, 0xcf);
ite_reg_write(GPIO_DEV, 0x27, 0x80);
ite_reg_write(GPIO_DEV, 0x28, 0x41);
ite_reg_write(GPIO_DEV, 0x29, 0x0a);
@@ -60,10 +60,9 @@ static void mb_gpio_init(void)
ite_reg_write(GPIO_DEV, 0x62, 0x08);
ite_reg_write(GPIO_DEV, 0x72, 0x00);
ite_reg_write(GPIO_DEV, 0x73, 0x00);
- ite_reg_write(GPIO_DEV, 0xb8, 0x00);
ite_reg_write(GPIO_DEV, 0xbb, 0x40);
ite_reg_write(GPIO_DEV, 0xc0, 0x00);
- ite_reg_write(GPIO_DEV, 0xc1, 0xc7);
+ ite_reg_write(GPIO_DEV, 0xc1, 0xcf);
ite_reg_write(GPIO_DEV, 0xc2, 0x80);
ite_reg_write(GPIO_DEV, 0xc3, 0x01);
ite_reg_write(GPIO_DEV, 0xc4, 0x0a);
@@ -74,12 +73,11 @@ static void mb_gpio_init(void)
ite_reg_write(GPIO_DEV, 0xf0, 0x10);
ite_reg_write(GPIO_DEV, 0xf1, 0x40);
ite_reg_write(GPIO_DEV, 0xf6, 0x26);
- ite_reg_write(GPIO_DEV, 0xfc, 0x52);
+ ite_reg_write(GPIO_DEV, 0xfc, 0x4a);
- ite_reg_write(EC_DEV, 0xf0, 0x80);
- ite_reg_write(EC_DEV, 0xf1, 0x00);
- ite_reg_write(EC_DEV, 0xf2, 0x0a);
+ ite_reg_write(EC_DEV, 0xf2, 0x2a);
ite_reg_write(EC_DEV, 0xf3, 0x80);
+ ite_reg_write(EC_DEV, 0xf4, 0x60);
ite_reg_write(EC_DEV, 0x70, 0x00); // Don't use IRQ9
ite_reg_write(EC_DEV, 0x30, 0x01); // Enable
I Applied The Above Patch, Rebuilt Coreboot, Installed It & These Are The Results:
coretemp-isa-0000
Adapter: ISA adapter
Core 0: +52.0°C (high = +73.0°C, crit = +85.0°C)
Core 1: +46.0°C (high = +73.0°C, crit = +85.0°C)
Core 2: +49.0°C (high = +73.0°C, crit = +85.0°C)
Core 3: +49.0°C (high = +73.0°C, crit = +85.0°C)
it8718-isa-0290
Adapter: ISA adapter
in0: +1.06 V (min = +0.00 V, max = +4.08 V)
in1: +1.90 V (min = +0.00 V, max = +4.08 V)
in2: +3.36 V (min = +0.00 V, max = +4.08 V)
+5V: +2.93 V (min = +0.00 V, max = +4.08 V)
in4: +4.08 V (min = +0.00 V, max = +4.08 V) ALARM
in5: +4.08 V (min = +0.00 V, max = +4.08 V) ALARM
in6: +1.20 V (min = +0.00 V, max = +4.08 V)
in7: +4.08 V (min = +0.00 V, max = +4.08 V) ALARM
Vbat: +3.06 V
fan1: 2089 RPM (min = 0 RPM)
fan2: 1513 RPM (min = 0 RPM)
temp1: +49.0°C (low = +28.0°C, high = +100.0°C) sensor = thermal diode
temp2: +127.0°C (low = +127.0°C, high = +127.0°C) sensor = thermal diode
temp3: +85.0°C (low = +33.0°C, high = +70.0°C) ALARM sensor = thermistor
cpu0_vid: +1.150 V
intrusion0: OKFWIW & With No Regard For The Above Patch: [w.r.t. Coreboot] Setting a Fan, Via The 'devicetree.cb' File, To The 'MODE_ON' Setting, Didn't Make Any Difference At All.
vazhnov
commented
3 years ago @zamaudio , could you share a link to your change with Change-Id: I8f0ce3e89da01f3a65d6f7b10b3c1482040dfe48 in https://review.coreboot.org ? I can't find it.
zamaudio
commented
3 years ago This was my latest attempt but I haven't pushed it to coreboot or tested it.
commit f8c125710f06894f1bb9c5a0ca628e3b4a49b2ca
Author: Damien Zammit <damien@zamaudio.com>
Date: Mon Aug 5 23:24:08 2019 +1000
gigabyte/ga-g41m-es2l: WIP Fix fan control
Previously, fan would spin at constant speed.
This change fixes the automatic fan control. (does it?)
Change-Id: I8f0ce3e89da01f3a65d6f7b10b3c1482040dfe48
Signed-off-by: Damien Zammit <damien@zamaudio.com>
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
index 7045dbf8e1..44fe45f3b0 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
@@ -82,13 +82,13 @@ chip northbridge/intel/x4x # Northbridge
device pci 1f.0 on # ISA bridge
subsystemid 0x1458 0x5001
chip superio/ite/it8718f # Super I/O
- register "TMPIN1.mode" = "THERMAL_RESISTOR"
- register "TMPIN2.mode" = "THERMAL_RESISTOR"
register "TMPIN3.mode" = "THERMAL_DIODE"
- register "TMPIN3.offset" = "0"
+ register "TMPIN3.min" = "0"
+ register "TMPIN3.max" = "127"
+ register "TMPIN3.offset" = "0xf6"
register "ec.vin_mask" = "VIN7 | VIN4 | VIN3 | VIN2 | VIN1 | VIN0"
- register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
+ register "FAN1.mode" = "FAN_MODE_ON"
register "FAN1.smart.tmpin" = "3"
register "FAN1.smart.tmp_off" = "25"
register "FAN1.smart.tmp_start" = "30"
@@ -98,7 +98,7 @@ chip northbridge/intel/x4x # Northbridge
register "FAN1.smart.pwm_start" = "0"
register "FAN1.smart.slope" = "10"
- register "FAN2.mode" = "FAN_SMART_AUTOMATIC"
+ register "FAN2.mode" = "FAN_MODE_ON"
register "FAN2.smart.tmpin" = "3"
register "FAN2.smart.tmp_off" = "25"
register "FAN2.smart.tmp_start" = "30"
@@ -134,13 +134,6 @@ chip northbridge/intel/x4x # Northbridge
io 0x60 = 0x290
irq 0x70 = 0x00
io 0x62 = 0x000
- irq 0xf0 = 0x80
- irq 0xf1 = 0x00
- irq 0xf2 = 0x0a
- irq 0xf3 = 0x80
- irq 0xf4 = 0x00
- irq 0xf5 = 0x00
- irq 0xf6 = 0xff
end
device pnp 2e.5 on # Keyboard
io 0x60 = 0x60
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
index e20fb7a888..cc9fee2021 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
@@ -52,7 +52,7 @@ static void mb_gpio_init(void)
/* Set default GPIOs on superio */
ite_reg_write(GPIO_DEV, 0x25, 0x00);
- ite_reg_write(GPIO_DEV, 0x26, 0xc7);
+ ite_reg_write(GPIO_DEV, 0x26, 0xcf);
ite_reg_write(GPIO_DEV, 0x27, 0x80);
ite_reg_write(GPIO_DEV, 0x28, 0x41);
ite_reg_write(GPIO_DEV, 0x29, 0x0a);
@@ -60,10 +60,9 @@ static void mb_gpio_init(void)
ite_reg_write(GPIO_DEV, 0x62, 0x08);
ite_reg_write(GPIO_DEV, 0x72, 0x00);
ite_reg_write(GPIO_DEV, 0x73, 0x00);
- ite_reg_write(GPIO_DEV, 0xb8, 0x00);
ite_reg_write(GPIO_DEV, 0xbb, 0x40);
ite_reg_write(GPIO_DEV, 0xc0, 0x00);
- ite_reg_write(GPIO_DEV, 0xc1, 0xc7);
+ ite_reg_write(GPIO_DEV, 0xc1, 0xcf);
ite_reg_write(GPIO_DEV, 0xc2, 0x80);
ite_reg_write(GPIO_DEV, 0xc3, 0x01);
ite_reg_write(GPIO_DEV, 0xc4, 0x0a);
@@ -74,12 +73,11 @@ static void mb_gpio_init(void)
ite_reg_write(GPIO_DEV, 0xf0, 0x10);
ite_reg_write(GPIO_DEV, 0xf1, 0x40);
ite_reg_write(GPIO_DEV, 0xf6, 0x26);
- ite_reg_write(GPIO_DEV, 0xfc, 0x52);
+ ite_reg_write(GPIO_DEV, 0xfc, 0x4a);
- ite_reg_write(EC_DEV, 0xf0, 0x80);
- ite_reg_write(EC_DEV, 0xf1, 0x00);
- ite_reg_write(EC_DEV, 0xf2, 0x0a);
+ ite_reg_write(EC_DEV, 0xf2, 0x2a);
ite_reg_write(EC_DEV, 0xf3, 0x80);
+ ite_reg_write(EC_DEV, 0xf4, 0x60);
ite_reg_write(EC_DEV, 0x70, 0x00); // Don't use IRQ9
ite_reg_write(EC_DEV, 0x30, 0x01); // Enable
mahdi-salimi05
commented
1 year ago tested?
zifxify
commented
11 months ago Any update on this ? @zamaudio @ArthurHeymans
zamaudio
commented
10 months ago @zifxify I'm sure upstream coreboot will accept a patch to resolve this. Feel free to work on it.
Tested on both the ga-g41m-es2l and the ga-945gcm-s2l: The fan runs at a fixed level, no matter the system load.