[3DS] 32x crashes with dynarec on

With dynarec on, 32x roms crash on launch on the 3DS. This seems to have broken in two ways in the last few months:

8d2a03b622419677a6998f6554df6b953526cec1 will run games, minus some random svcBackdoor crashes that #136 should fix.
In 90c7dbc0c1addd020195e14f81b7a67850610d1b, loading a 32x game will quit to the home menu with the message, "host register 1 is locked", but will not crash the system. This is after the large batch of commits on July 4.
In 5f95cd403db17045ae5bc676fb6b19936abd71c5, following another batch of dynarec commits, the core will crash when launching a rom.

Unfortunately I have not been able to bisect closer than that, because many of the intermediate commits won't build for me without changes. Happy to help with symbols or lookups if necessary.

The crash happens because some code changes pc to point to the first element of blink_free, which is 0. I haven't been able to find stack breadcrumbs or break anywhere close to the crash. The best clue I have is that it crashes sometime after hitting this block of code, where the registers look very similar to what they look like when it crashes:

   0x5f21a0 <tcache_default+416>:       ldrne   r2, [r11, #64]  ; 0x40
   0x5f21a4 <tcache_default+420>:       and     r1, r2, #1016   ; 0x3f8
   0x5f21a8 <tcache_default+424>:       add     r1, r11, r1
   0x5f21ac <tcache_default+428>:       strne   r2, [r1, #312]  ; 0x138
   0x5f21b0 <tcache_default+432>:       strne   r0, [r1, #316]  ; 0x13c
   0x5f21b4 <tcache_default+436>:       bxne    r0
   0x5f21b8 <tcache_default+440>:       mov     r0, r11
   0x5f21bc <tcache_default+444>:       ldr     r1, [r11, #120] ; 0x78
=> 0x5f21c0 <tcache_default+448>:       bl      0x3e0d3c <sh2_translate>

Here is the full crash dump:

Processor: Arm11 (core 0)
Exception type: prefetch abort
Fault status: Permission - Page
Current process: 3dsx_app (0004001000021100)

Register dump:

r0             00947000            r1             084f1ef8
r2             00000002            r3             00000000
r4             00503460            r5             000003f3
r6             00501ce0            r7             00501c00
r8             00000000            r9             00000000
r10            004f20f0            r11            00503460
r12            00000204            sp             0ffffe30
lr             00000000            pc             00967000

cpsr           000f0010            dfsr           000008ff
ifsr           0000000f            far            fbf7ffe6
fpexc          40000700            fpinst         eef47ac7
fpinst2        eef47ac7

Code dump:

  966fd4:       00000000        andeq   r0, r0, r0
  966fd8:       00000000        andeq   r0, r0, r0
  966fdc:       00000000        andeq   r0, r0, r0
  966fe0:       00000000        andeq   r0, r0, r0
  966fe4:       00000000        andeq   r0, r0, r0
  966fe8:       00000000        andeq   r0, r0, r0
  966fec:       00000000        andeq   r0, r0, r0
  966ff0:       00000000        andeq   r0, r0, r0
  966ff4:       00000000        andeq   r0, r0, r0
  966ff8:       00000000        andeq   r0, r0, r0
  966ffc:       00000000        andeq   r0, r0, r0
  967000:       00000000        andeq   r0, r0, r0

Stack dump:

0ffffe30:  60 34 50 00 f3 03 00 00  e0 1c 50 00 00 1c 50 00   |`4P.......P...P.|
0ffffe40:  60 34 50 00 d2 06 09 00  52 a0 00 00 80 66 08 00   |`4P.....R....f..|
0ffffe50:  00 00 00 00 4c 93 34 00  90 68 08 00 e0 2c 50 00   |....L.4..h...,P.|
0ffffe60:  e0 1c 50 00 b0 9c 2f 00  c0 36 00 00 d2 06 09 00   |..P.../..6......|
0ffffe70:  08 40 0d 06 20 00 00 00  d2 06 09 00 60 f3 4d 00   |.@.. .......`.M.|
0ffffe80:  00 bc 4b 00 29 22 00 00  00 1c 50 00 00 00 00 00   |..K.)"....P.....|
0ffffe90:  00 00 00 00 a8 c1 2f 00  62 07 00 02 76 01 00 00   |....../.b...v...|
0ffffea0:  b0 1f 40 00 60 f3 4d 00  29 22 00 00 1c 10 36 00   |..@.`.M.)"....6.|
0ffffeb0:  20 51 a1 00 58 c2 2f 00  a1 00 00 00 78 f1 31 00   | Q..X./.....x.1.|
0ffffec0:  60 f3 4d 00 a4 00 00 00  00 00 00 00 5a 00 00 00   |`.M.........Z...|
0ffffed0:  60 f3 4d 00 5c c1 4b 00  00 bc 4b 00 78 ab 2f 00   |`.M.\.K...K.x./.|
0ffffee0:  00 00 00 00 00 00 00 00  00 00 00 3f 01 00 3a 00   |...........?..:.|
0ffffef0:  88 b8 1d 00 00 00 00 00  00 00 00 00 0c 00 00 00   |................|
0fffff00:  d0 ab 4b 00 20 f9 3a 00  88 b8 1d 00 64 c1 4b 00   |..K. .:.....d.K.|
0fffff10:  01 00 00 00 5c c1 4b 00  96 8b 0d 00 64 d2 2d 00   |....\.K.....d.-.|
0fffff20:  a0 79 49 00 78 1b 36 00  30 ff ff 0f 00 00 00 00   |.yI.x.6.0.......|
0fffff30:  00 00 00 00 02 00 00 00  a0 79 49 00 01 00 00 00   |.........yI.....|
0fffff40:  ff ff ff ff 01 00 ff ff  a0 79 49 00 c0 24 00 08   |.........yI..$..|
0fffff50:  96 8b 0d 00 84 0c 2a 00  a0 b9 47 00 a0 29 4b 00   |......*...G..)K.|
0fffff60:  ff ff ff ff ff ff ff ff  01 00 ff ff 80 62 2d 00   |.............b-.|
0fffff70:  68 fb 44 00 98 86 7e fb  05 00 00 00 c0 e4 00 08   |h.D...~.........|
0fffff80:  00 00 00 00 00 00 00 00  94 f9 46 00 c0 24 00 08   |..........F..$..|
0fffff90:  96 8b 0d 00 a0 29 4b 00  02 00 00 00 00 00 00 00   |.....)K.........|
0fffffa0:  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00   |................|
0fffffb0:  a0 89 49 00 a0 79 49 00  00 00 00 00 02 00 00 00   |..I..yI.........|
0fffffc0:  a0 24 00 08 a0 29 4b 00  00 00 00 00 20 6c 2d 00   |.$...)K..... l-.|
0fffffd0:  a0 24 00 08 00 00 00 00  1c 11 1b 00 02 00 00 00   |.$..............|
0fffffe0:  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00   |................|
0ffffff0:  00 00 00 00 00 00 00 00  00 00 00 00 bc 05 10 00   |................|

I hear the core is crashing with 32x games on Vita, as well, so this issue may affect beyond just 3DS.

Yes, OpenDingux platforms experience the same issue...

It might be worth raising this over at irixxxx's fork: https://github.com/irixxxx/picodrive (most of the recent updates to the core come from here)

I believe he is only interested in the stand-alone builds, but he seems to be a wizard with this codebase, and he may have some sympathy for RA...

I believe he is only interested in the stand-alone builds, but he seems to be a wizard with this codebase, and he may have some sympathy for RA...

I suspect that may be a pragmatic choice on their part, as they had been sending us PRs at the same time as upstream, but it was quite a hassle for them. Hopefully this is something simple, though, and they can at least point us in the right direction.

Thanks for the recommendation, I raised this over there.

ARM DRC crashes are due to the cache handling. I accidently changed that to the libc clear_cache function, disabling the cache handling for non-linux systems in libretro.c. Corrected in my repo.

@jdgleaver re opendingux: what exactly is happening? Where can I find more info on this? BTW is there an official opendingux release somewhere? Apparently buildbot isn't making one. I have an RG350 so I could do a crosscheck to see if there's more to this.

I believe he is only interested in the stand-alone builds, but he seems to be a wizard with this codebase, and he may have some sympathy for RA...

Ah, I'm not only in standalone builds. In fact I'm doing a more or less regular picodrive libretro build on linux (x86, RPi1 and Odroid) and OSX to check it's still working on x86_64, armv6, armv7 and armv8. My problem is more related to limited resources. Besides only having limited spare time, I'm normally not doing Windows stuff (don't have that at home), and my hardware cache is rather limited so I can only test a very limited set of the libretro targets. Time constraints may ease if I'm through with my list (currently libretro#135, notaz#118, and adding chd support). At that point I might have more time to work on libretro support. I really wish you had contacted me before cherry-picking all those commits... I was about to produce 1.97 after my last bugfixing spree and offer you a PR for that (that's why I commented on those other issues). I suspect that may now get more complicated... How can I proceed from here without making maintaining my two upstream branches a hell?

@irixxxx Firstly, I do apologise most sincerely for making a mess with those cherry picks. I had no idea that you were interested in the libretro core, and just saw that we had cherry picked your commits in the past - and so I did the same. I see now that this was a big mistake! It won't happen again.

Please don't worry - we can very easily revert anything on our side. Is it just my PR that needs to be undone? Or are there previous cherry picks as well? Just let us know what you need us to do, and we can sort it out. We would be incredibly grateful for a PR that includes a proper compilation of your 1.97 fixes - that would be so much better than our clumsy cherry picks.

Regarding OpenDingux - I'm afraid my ability to debug the issue is limited. I don't have a network adaptor for the device, so have no command line access or remote gdb. At present, attempting to load any 32x content just crashes RetroArch back to the 'desktop', with nothing of any value in RA's log. Note that I haven't yet tested your commit from yesterday - I'll try this as soon as I get access to my RG350M.

We don't have an official release of the OpenDingux build yet - I only started cleaning it up a few weeks ago, and we're also currently moving over to new build infrastructure (many of our more exotic ports haven't been set up). But if you would like to try anything, this is a very recent build: https://drive.google.com/file/d/1fWEYfNIsf_n7cOWW8M47xTkB29qLvD0I/view. Install the OPK as normal, and just copy the .retroarch folder to your home directory.

Also, I don't want to confuse matters (so please ignore this for now!), but I noticed just last night that some Sega CD titles randomly freeze with the core on OpenDingux - not a crash (the quick menu can still be opened, and content can be closed), but the image hangs and the audio becomes static noise. Perhaps this is something similar to the 32x hang that you fixed recently? I only tested this very briefly though (it's quite rare, and only Silpheed seems to hang with any regularity), so haven't opened an issue for it yet - I will do so if I can find an easily repeatable test case, and once I have a save state of an affected game.

Just for info - with commit https://github.com/irixxxx/picodrive/commit/69c22514b0257b85189cf1acb5f20d62edf23749 on OpenDingux, the core gets a little further but RetroArch still crashes to the 'desktop'. These are the final lines of the log - unfortunately not very useful:

[INFO] SET_GEOMETRY: 320x224, aspect: 1.429.
[libretro INFO] 00003:156: 32X startup
[libretro INFO] 00003:156: drc_cmn_init: 0x75b32000, 4194304 bytes: 0
[INFO] [Environ]: SET_GEOMETRY.

OK, let me think a bit about how to handle the repos. I'm no real git buff, but anyway all is not lost, I think.

Here's something to produce debug output. Could you please apply the diff and send me the output?


diff --git a/Makefile b/Makefile
index 2060b51..8af754e 100644
--- a/Makefile
+++ b/Makefile
@@ -70,6 +70,24 @@ use_sh2drc ?= 1
 endif
 endif

+ifeq "$(ARCH)" "arm"
+OBJS += platform/common/host_dasm.o cpu/sh2/mame/sh2dasm.o
+else ifneq (,$(findstring 86,$(ARCH)))
+OBJS += platform/libpicofe/linux/host_dasm.o cpu/sh2/mame/sh2dasm.o
+LDFLAGS += -lbfd -lopcodes -liberty
+else ifneq (,$(findstring mips,$(ARCH)))
+OBJS += platform/common/host_dasm.o cpu/sh2/mame/sh2dasm.o
+else ifneq (,$(findstring aarch64,$(ARCH)))
+OBJS += platform/libpicofe/linux/host_dasm.o cpu/sh2/mame/sh2dasm.o
+LDFLAGS += -lbfd -lopcodes -liberty
+else ifneq (,$(findstring riscv,$(ARCH)))
+OBJS += platform/libpicofe/linux/host_dasm.o cpu/sh2/mame/sh2dasm.o
+LDFLAGS += -lbfd -lopcodes -liberty
+else ifneq (,$(findstring powerpc,$(ARCH)))
+OBJS += platform/libpicofe/linux/host_dasm.o cpu/sh2/mame/sh2dasm.o
+LDFLAGS += -lbfd -lopcodes -liberty
+endif
+
 -include Makefile.local

 ifeq "$(PLATFORM)" "opendingux"
diff --git a/cpu/sh2/compiler.c b/cpu/sh2/compiler.c
index fbabbd9..a087165 100644
--- a/cpu/sh2/compiler.c
+++ b/cpu/sh2/compiler.c
@@ -70,7 +70,7 @@
 // 800 - state dump on exit
 // {
 #ifndef DRC_DEBUG
-#define DRC_DEBUG 0//x847
+#define DRC_DEBUG 0x847
 #endif

 #if DRC_DEBUG

Regarding mips32, just to make sure: what device are you running this on? The Makefile compiles for mips32r2, which is correct JZ4770 devices and higher, but anything older only has mips32r1.

@irixxxx Many thanks for the diff. I'm running this on an RG350M (we only 'officially' support JZ4770 and higher devices).

Unfortunately, no real output is produced - here's the full log, up until the point where it crashes: retroarch2020_10_2822_34_12.log

(I should note that all non-32x content launches correctly)

Regarding the repo - if we need to switch over to a new 'master' branch and delete those cherry picked commits from the history of that branch, I don't think that would be a problem. Whatever turns out to be easiest for you, I'm sure we can do it.

It appears to be crashing, apparently in rcache_create if all output is really visible (it might not since something might be cached in libc).

Do you have debugging capabilities on your rg350? It would be nice to use a debugger to see where it crashes, either by using a debugger or by enabling core dumps and use a post-mortem debugger. A break on the exit()-function and a backtrace would also be helpful if there's no real crash.

I can do it if you don't have the resources. I can't probably do it before the weekend, though. That reminds me, is there a sanctioned way to inject my self-built picodrive core into retroarch? Currently I'm doing this by starting retroarch via the command line with a heap of options.

Regarding the repo, I have a secondary upstream branch for libretro. I'm currently experimenting with git to see if I can resolve the issues by taking over all newer commits from my notaz upstream branch. Unfortunately I can't simply merge, since the divergence point is way in the past and it produces a huge amount of conflicts. Going to see if I can resolve this by cherrypicking, but I'm not really hopeful that it would be possible without scrambling the history. Maybe the best way would really be to unroll some stuff, then cherrypick all newer commits from irixxxx/master and libretro/master back. At least that would allow for a clean PR. It still sounds ugly, though. Better ideas very welcome.

Do you have debugging capabilities on your rg350? It would be nice to use a debugger to see where it crashes, either by using a debugger or by enabling core dumps and use a post-mortem debugger. A break on the exit()-function and a backtrace would also be helpful if there's no real crash.

Unfortunately no - I don't own the requisite network adaptor hardware, so I've been limited to printf-style debugging via the log. This has been fine for my own work on RetroArch (I'm somewhat used to working on platforms with no proper debugging support, and I'm very comfortable with the frontend code anyway), but it's not much use for a large unfamiliar codebase like this one. I apologise for my glaring inadequacy here - I fully understand that this bug report must very unhelpful and annoying for you :(

I can do it if you don't have the resources. I can't probably do it before the weekend, though.

If you would be willing to run a debugger on this, you would have my sincere gratitude. And please - there is absolutely no hurry at all. Please don't let this interfere with your other work and commitments. This weekend, next weekend, whenever - your time is valuable, and I appreciate any that you can spare.

That reminds me, is there a sanctioned way to inject my self-built picodrive core into retroarch? Currently I'm doing this by starting retroarch via the command line with a heap of options.

You're building via Makefile.libretro, right? So you're generating the standard picodrive_libretro.* shared object library?

In that case, all you have to do is copy your self-built core to RetroArch's cores directory (overwriting any existing file). Alternatively, you can do this via RetroArch's menu - go to Settings > Core > Manage Cores and select Install or Restore a Core, then just locate your self-built library in the file browser.

Once your core is 'installed' via either of these methods, it will be handled exactly like the regular core from the buildbot.

Regarding the repo, I have a secondary upstream branch for libretro. I'm currently experimenting with git to see if I can resolve the issues by taking over all newer commits from my notaz upstream branch. Unfortunately I can't simply merge, since the divergence point is way in the past and it produces a huge amount of conflicts. Going to see if I can resolve this by cherrypicking, but I'm not really hopeful that it would be possible without scrambling the history. Maybe the best way would really be to unroll some stuff, then cherrypick all newer commits from irixxxx/master and libretro/master back. At least that would allow for a clean PR. It still sounds ugly, though. Better ideas very welcome.

I'm not sure either how to do this elegantly without editing the history - this is generally frowned upon, but making a new branch from libretro/master and deleting commits should be acceptable (i.e. as long as we don't 'corrupt' the history of libretro/master itself). Then you'd have a clean base, and if we merged your PR on top of that, the new branch could then become our default (have to update our buildbot links, but I guess that's not too much trouble).

Honestly, you are the primary developer of Picodrive now - we should be doing all we can to accommodate you :)

If we can do anything to help fix the mess on our end, just let us know.

Do you have debugging capabilities on your rg350? It would be nice to use a debugger to see where it crashes, either > Unfortunately no - I don't own the requisite network adaptor hardware, so I've been limited to printf-style debugging via

You need an adaptor? Am I missing something here? I normally connect it via USB. On OSX it offers a network interface which is automatically managed. Just plug it in and ssh or telnet to 10.1.1.2. I'm normally producing a core file for crashes, e.g. add something like this to a start script: echo '/media/data/pico_core_%e_%p' > /proc/sys/kernel/core_pattern ulimit -c unlimited The core file can be easily copied via scp and examined by installing gdb-multiarch on any debian based development host.

If you would be willing to run a debugger on this, you would have my sincere gratitude. And please - there is absolutely no hurry at all. Please don't let this interfere with your other work and commitments. This weekend, next weekend, whenever - your time is valuable, and I appreciate any that you can spare.

Thank you. I was more and more getting the impression a lot of people are not appreciating donating time to the public in any form. There are those who do, fortunately.

In that case, all you have to do is copy your self-built core to RetroArch's cores directory (overwriting any existing file). Alternatively, you can do this via RetroArch's menu - go to Settings > Core > Manage Cores and select Install or Restore a Core, then just locate your self-built library in the file browser.

Ah, I somehow missed this "install a core" stuff. Thanks for that, it will make working on rg350 easier, since you can't start anything useful via command line while gmenu2x is running.

I'm not sure either how to do this elegantly without editing the history - this is generally frowned upon, but making a new branch from libretro/master and deleting commits should be acceptable (i.e. as long as we don't 'corrupt' the history of libretro/master itself). Then you'd have a clean base, and if we merged your PR on top of that, the new branch could then become our default (have to update our buildbot links, but I guess that's not too much trouble).

I'll try to wrap some suggestion up. There's some stuff for me to learn about git, I reckon. It's no standard use case, apparently not covered in any "good practice" guide I've read until now.

Honestly, you are the primary developer of Picodrive now - we should be doing all we can to accommodate you :) If we can do anything to help fix the mess on our end, just let us know.

Hmm, I never intended this. However, after more than 200 commits I suspect I should accept it, although there are still larger parts of the code base I've never been into, besides lacking the hardware know-how notaz and others have built up.

You need an adaptor? Am I missing something here? I normally connect it via USB. On OSX it offers a network interface which is automatically managed. Just plug it in and ssh or > > telnet to 10.1.1.2. I'm normally producing a core file for crashes, e.g. add something like this to a start script: echo '/media/data/picocore%e_%p' > /proc/sys/kernel/core_pattern ulimit -c unlimited The core file can be easily copied via scp and examined by installing gdb-multiarch on any debian based development host.

No, it's me who was missing something! I had no idea that you could do this via USB - I thought it needed a network connection. Well, that's egg on my face...

Here's the output from gdb when running RetroArch:

(gdb) run
Starting program: /media/data/local/home/retroarch 
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/libthread_db.so.1".
DRC registers created, 21 host regs (4 REG, 3 STATIC, 1 CTX)
   75bb4000 00802025 move $a0, $a0
sh2_drc_write8:
   75bb4004 8ee6006c lw $a2, 108($s7)
   75bb4008 00043e42 srl $a3, $a0, 25
   75bb400c 00073880 sll $a3, $a3, 2
   75bb4010 00c70821 addu $at, $a2, $a3
   75bb4014 8c270000 lw $a3, 0($at)
   75bb4018 00e00008 jr $a3
   75bb401c 02e03025 move $a2, $s7
sh2_drc_write16:
   75bb4020 8ee60070 lw $a2, 112($s7)
   75bb4024 00043e42 srl $a3, $a0, 25
   75bb4028 00073880 sll $a3, $a3, 2
   75bb402c 00c70821 addu $at, $a2, $a3
   75bb4030 8c270000 lw $a3, 0($at)
   75bb4034 00e00008 jr $a3
   75bb4038 02e03025 move $a2, $s7
sh2_drc_write32:
   75bb403c 8ee60074 lw $a2, 116($s7)
   75bb4040 00043e42 srl $a3, $a0, 25
   75bb4044 00073880 sll $a3, $a3, 2
   75bb4048 00c70821 addu $at, $a2, $a3
   75bb404c 8c270000 lw $a3, 0($at)
   75bb4050 00e00008 jr $a3
   75bb4054 02e03025 move $a2, $s7
sh2_drc_read8:
   75bb4058 8ee50060 lw $a1, 96($s7)
   75bb405c 00043e42 srl $a3, $a0, 25
   75bb4060 000708c0 sll $at, $a3, 3
   75bb4064 00a12821 addu $a1, $a1, $at
   75bb4068 8ca60000 lw $a2, 0($a1)
   75bb406c 8ca70004 lw $a3, 4($a1)
   75bb4070 00c67821 addu $t7, $a2, $a2
   75bb4074 01e6c02b sltu $t8, $t7, $a2
   75bb4078 17000006 bne $t8, $zero, 0x75bb4094 <unknown>
   75bb407c 01e03025 move $a2, $t7
   75bb4080 00872024 and $a0, $a0, $a3
   75bb4084 38840001 xori $a0, $a0, 0x1
   75bb4088 00c40821 addu $at, $a2, $a0
   75bb408c 03e00008 jr $ra
   75bb4090 80220000 lb $v0, 0($at)
   75bb4094 00c00008 jr $a2
   75bb4098 02e02825 move $a1, $s7
sh2_drc_read16:
   75bb409c 8ee50064 lw $a1, 100($s7)
   75bb40a0 00043e42 srl $a3, $a0, 25
   75bb40a4 000708c0 sll $at, $a3, 3
   75bb40a8 00a12821 addu $a1, $a1, $at
   75bb40ac 8ca60000 lw $a2, 0($a1)
   75bb40b0 8ca70004 lw $a3, 4($a1)
   75bb40b4 00c67821 addu $t7, $a2, $a2
   75bb40b8 01e6c02b sltu $t8, $t7, $a2
   75bb40bc 17000005 bne $t8, $zero, 0x75bb40d4 <unknown>
   75bb40c0 01e03025 move $a2, $t7
   75bb40c4 00872024 and $a0, $a0, $a3
   75bb40c8 00c40821 addu $at, $a2, $a0
   75bb40cc 03e00008 jr $ra
   75bb40d0 84220000 lh $v0, 0($at)
   75bb40d4 00c00008 jr $a2
   75bb40d8 02e02825 move $a1, $s7
sh2_drc_read32:
   75bb40dc 8ee50068 lw $a1, 104($s7)
   75bb40e0 00043e42 srl $a3, $a0, 25
   75bb40e4 000708c0 sll $at, $a3, 3
   75bb40e8 00a12821 addu $a1, $a1, $at
   75bb40ec 8ca60000 lw $a2, 0($a1)
   75bb40f0 8ca70004 lw $a3, 4($a1)
   75bb40f4 00c67821 addu $t7, $a2, $a2
   75bb40f8 01e6c02b sltu $t8, $t7, $a2
   75bb40fc 17000008 bne $t8, $zero, 0x75bb4120 <unknown>
   75bb4100 01e03025 move $a2, $t7
   75bb4104 00872024 and $a0, $a0, $a3
   75bb4108 00c40821 addu $at, $a2, $a0
   75bb410c 8c220000 lw $v0, 0($at)
   75bb4110 00020c00 sll $at, $v0, 16
   75bb4114 00021402 srl $v0, $v0, 16
   75bb4118 03e00008 jr $ra
   75bb411c 00411025 or $v0, $v0, $at
   75bb4120 00c00008 jr $a2
   75bb4124 02e02825 move $a1, $s7
sh2_drc_read8_poll:
   75bb4128 8ee50060 lw $a1, 96($s7)
   75bb412c 00043e42 srl $a3, $a0, 25
   75bb4130 000708c0 sll $at, $a3, 3
   75bb4134 00a12821 addu $a1, $a1, $at
   75bb4138 8ca60000 lw $a2, 0($a1)
   75bb413c 8ca70004 lw $a3, 4($a1)
   75bb4140 00c67821 addu $t7, $a2, $a2
   75bb4144 01e6c02b sltu $t8, $t7, $a2
   75bb4148 13000003 beq $t8, $zero, 0x75bb4158 <unknown>
   75bb414c 01e03025 move $a2, $t7
   75bb4150 00c00008 jr $a2
   75bb4154 02e02825 move $a1, $s7
   75bb4158 00872824 and $a1, $a0, $a3
   75bb415c 38a50001 xori $a1, $a1, 0x1
   75bb4160 00c50821 addu $at, $a2, $a1
   75bb4164 80250000 lb $a1, 0($at)
   75bb4168 27bdffe8 addiu $sp, $sp, -24
   75bb416c afbf0014 sw $ra, 20($sp)
   75bb4170 afa50010 sw $a1, 16($sp)
   75bb4174 0d63fa31 jal 0x758fe8c4 <unknown>
   75bb4178 02e03025 move $a2, $s7
   75bb417c 8fa50010 lw $a1, 16($sp)
   75bb4180 8fbf0014 lw $ra, 20($sp)
   75bb4184 03e00008 jr $ra
   75bb4188 27bd0018 addiu $sp, $sp, 24
sh2_drc_read16_poll:
   75bb418c 8ee50064 lw $a1, 100($s7)
   75bb4190 00043e42 srl $a3, $a0, 25
   75bb4194 000708c0 sll $at, $a3, 3
   75bb4198 00a12821 addu $a1, $a1, $at
   75bb419c 8ca60000 lw $a2, 0($a1)
   75bb41a0 8ca70004 lw $a3, 4($a1)
   75bb41a4 00c67821 addu $t7, $a2, $a2
   75bb41a8 01e6c02b sltu $t8, $t7, $a2
   75bb41ac 13000003 beq $t8, $zero, 0x75bb41bc <unknown>
   75bb41b0 01e03025 move $a2, $t7
   75bb41b4 00c00008 jr $a2
   75bb41b8 02e02825 move $a1, $s7
   75bb41bc 00872824 and $a1, $a0, $a3
   75bb41c0 00c50821 addu $at, $a2, $a1
   75bb41c4 84250000 lh $a1, 0($at)
   75bb41c8 27bdffe8 addiu $sp, $sp, -24
   75bb41cc afbf0014 sw $ra, 20($sp)
   75bb41d0 afa50010 sw $a1, 16($sp)
   75bb41d4 0d63fa5b jal 0x758fe96c <unknown>
   75bb41d8 02e03025 move $a2, $s7
   75bb41dc 8fa50010 lw $a1, 16($sp)
   75bb41e0 8fbf0014 lw $ra, 20($sp)
   75bb41e4 03e00008 jr $ra
   75bb41e8 27bd0018 addiu $sp, $sp, 24
sh2_drc_read32_poll:
   75bb41ec 8ee50068 lw $a1, 104($s7)
   75bb41f0 00043e42 srl $a3, $a0, 25
   75bb41f4 000708c0 sll $at, $a3, 3
   75bb41f8 00a12821 addu $a1, $a1, $at
   75bb41fc 8ca60000 lw $a2, 0($a1)
   75bb4200 8ca70004 lw $a3, 4($a1)
   75bb4204 00c67821 addu $t7, $a2, $a2
   75bb4208 01e6c02b sltu $t8, $t7, $a2
   75bb420c 13000003 beq $t8, $zero, 0x75bb421c <unknown>
   75bb4210 01e03025 move $a2, $t7
   75bb4214 00c00008 jr $a2
   75bb4218 02e02825 move $a1, $s7
   75bb421c 00872824 and $a1, $a0, $a3
   75bb4220 00c50821 addu $at, $a2, $a1
   75bb4224 8c250000 lw $a1, 0($at)
   75bb4228 00050c00 sll $at, $a1, 16
   75bb422c 00052c02 srl $a1, $a1, 16
   75bb4230 00a12825 or $a1, $a1, $at
   75bb4234 27bdffe8 addiu $sp, $sp, -24
   75bb4238 afbf0014 sw $ra, 20($sp)
   75bb423c afa50010 sw $a1, 16($sp)
   75bb4240 0d63faca jal 0x758feb28 <unknown>
   75bb4244 02e03025 move $a2, $s7
   75bb4248 8fa50010 lw $a1, 16($sp)
   75bb424c 8fbf0014 lw $ra, 20($sp)
   75bb4250 03e00008 jr $ra
   75bb4254 27bd0018 addiu $sp, $sp, 24
sh2_drc_exit:
   75bb4258 aee40040 sw $a0, 64($s7)
   75bb425c aef50000 sw $s5, 0($s7)
   75bb4260 aef40004 sw $s4, 4($s7)
   75bb4264 aef6004c sw $s6, 76($s7)
   75bb4268 8fb00014 lw $s0, 20($sp)
   75bb426c 8fb10018 lw $s1, 24($sp)
   75bb4270 8fb2001c lw $s2, 28($sp)
   75bb4274 8fb30020 lw $s3, 32($sp)
   75bb4278 8fb40024 lw $s4, 36($sp)
   75bb427c 8fb50028 lw $s5, 40($sp)
   75bb4280 8fb6002c lw $s6, 44($sp)
   75bb4284 8fb70030 lw $s7, 48($sp)
   75bb4288 8fbc0034 lw $gp, 52($sp)
   75bb428c 8fbe0038 lw $fp, 56($sp)
   75bb4290 8fbf003c lw $ra, 60($sp)
   75bb4294 03e00008 jr $ra
   75bb4298 27bd0040 addiu $sp, $sp, 64
sh2_drc_dispatcher:
   75bb429c 308503f8 andi $a1, $a0, 0x3f8
   75bb42a0 02e52821 addu $a1, $s7, $a1
   75bb42a4 8ca60138 lw $a2, 312($a1)
   75bb42a8 14c40004 bne $a2, $a0, 0x75bb42bc <unknown>
   75bb42ac aee40040 sw $a0, 64($s7)
   75bb42b0 8ca2013c lw $v0, 316($a1)
   75bb42b4 00400008 jr $v0
   75bb42b8 00000000 nop
   75bb42bc 02e02825 move $a1, $s7
   75bb42c0 0d682f93 jal 0x75a0be4c <unknown>
   75bb42c4 26e60078 addiu $a2, $s7, 120
   75bb42c8 10400007 beq $v0, $zero, 0x75bb42e8 <unknown>
   75bb42cc 00000000 nop
   75bb42d0 8ee60040 lw $a2, 64($s7)
   75bb42d4 30c503f8 andi $a1, $a2, 0x3f8
   75bb42d8 02e52821 addu $a1, $s7, $a1
   75bb42dc aca60138 sw $a2, 312($a1)
   75bb42e0 00400008 jr $v0
   75bb42e4 aca2013c sw $v0, 316($a1)
   75bb42e8 02e02025 move $a0, $s7
   75bb42ec 0d6877b5 jal 0x75a1ded4 <unknown>
   75bb42f0 8ee50078 lw $a1, 120($s7)
   75bb42f4 10400003 beq $v0, $zero, 0x75bb4304 <unknown>
   75bb42f8 00000000 nop
   75bb42fc 00400008 jr $v0
   75bb4300 00000000 nop
   75bb4304 0d683361 jal 0x75a0cd84 <unknown>
   75bb4308 00000000 nop
sh2_drc_dispatcher_call:
   75bb430c 8ee600b4 lw $a2, 180($s7)
   75bb4310 24c60008 addiu $a2, $a2, 8
   75bb4314 30c60078 andi $a2, $a2, 0x78
   75bb4318 aee600b4 sw $a2, 180($s7)
   75bb431c 02e63821 addu $a3, $s7, $a2
   75bb4320 8ee60048 lw $a2, 72($s7)
   75bb4324 00bf2821 addu $a1, $a1, $ra
   75bb4328 ace500bc sw $a1, 188($a3)
   75bb432c 03e00008 jr $ra
   75bb4330 ace600b8 sw $a2, 184($a3)
sh2_drc_dispatcher_return:
   75bb4334 8ee600b4 lw $a2, 180($s7)
   75bb4338 02e62821 addu $a1, $s7, $a2
   75bb433c 8ca700b8 lw $a3, 184($a1)
   75bb4340 1487ffd6 bne $a0, $a3, 0x75bb429c <sh2_drc_dispatcher>
   75bb4344 00000000 nop
   75bb4348 8ca400bc lw $a0, 188($a1)
   75bb434c 24c6fff8 addiu $a2, $a2, -8
   75bb4350 30c60078 andi $a2, $a2, 0x78
   75bb4354 00800008 jr $a0
   75bb4358 aee600b4 sw $a2, 180($s7)
sh2_drc_test_irq:
   75bb435c 8ee50548 lw $a1, 1352($s7)
   75bb4360 00162102 srl $a0, $s6, 4
   75bb4364 3084000f andi $a0, $a0, 0xf
   75bb4368 0085082a slt $at, $a0, $a1
   75bb436c 14200003 bne $at, $zero, 0x75bb437c <unknown>
   75bb4370 00000000 nop
   75bb4374 03e00008 jr $ra
   75bb4378 00000000 nop
   75bb437c 8ef0003c lw $s0, 60($s7)
   75bb4380 2610fff8 addiu $s0, $s0, -8
   75bb4384 aef0003c sw $s0, 60($s7)
   75bb4388 26040004 addiu $a0, $s0, 4
   75bb438c 02c02825 move $a1, $s6
   75bb4390 30a503ff andi $a1, $a1, 0x3ff
   75bb4394 0d64114e jal 0x75904538 <unknown>
   75bb4398 02e03025 move $a2, $s7
   75bb439c 02002025 move $a0, $s0
   75bb43a0 8ee50040 lw $a1, 64($s7)
   75bb43a4 0d64114e jal 0x75904538 <unknown>
   75bb43a8 02e03025 move $a2, $s7
   75bb43ac 8ee50548 lw $a1, 1352($s7)
   75bb43b0 2401ff0f addiu $at, $zero, -241
   75bb43b4 02c1b024 and $s6, $s6, $at
   75bb43b8 00050900 sll $at, $a1, 4
   75bb43bc 02c1b025 or $s6, $s6, $at
   75bb43c0 3401d000 ori $at, $zero, 0xd000
   75bb43c4 02c1b023 subu $s6, $s6, $at
   75bb43c8 8ee10558 lw $at, 1368($s7)
   75bb43cc 0020f809 jalr $ra, $at
   75bb43d0 02e02025 move $a0, $s7
   75bb43d4 8ee50054 lw $a1, 84($s7)
   75bb43d8 00020880 sll $at, $v0, 2
   75bb43dc 0d6ed037 jal 0x75bb40dc <sh2_drc_read32>
   75bb43e0 00a12021 addu $a0, $a1, $at
   75bb43e4 096ed0a7 j 0x75bb429c <sh2_drc_dispatcher>
   75bb43e8 00402025 move $a0, $v0
sh2_drc_entry:
   75bb43ec 27bdffc0 addiu $sp, $sp, -64
   75bb43f0 afbf003c sw $ra, 60($sp)
   75bb43f4 afbe0038 sw $fp, 56($sp)
   75bb43f8 afbc0034 sw $gp, 52($sp)
   75bb43fc afb70030 sw $s7, 48($sp)
   75bb4400 afb6002c sw $s6, 44($sp)
   75bb4404 afb50028 sw $s5, 40($sp)
   75bb4408 afb40024 sw $s4, 36($sp)
   75bb440c afb30020 sw $s3, 32($sp)
   75bb4410 afb2001c sw $s2, 28($sp)
   75bb4414 afb10018 sw $s1, 24($sp)
   75bb4418 afb00014 sw $s0, 20($sp)
   75bb441c 0080b825 move $s7, $a0
   75bb4420 8ef50000 lw $s5, 0($s7)
   75bb4424 8ef40004 lw $s4, 4($s7)
   75bb4428 0d6ed0d7 jal 0x75bb435c <sh2_drc_test_irq>
   75bb442c 8ef6004c lw $s6, 76($s7)
   75bb4430 096ed0a7 j 0x75bb429c <sh2_drc_dispatcher>
   75bb4434 8ee40040 lw $a0, 64($s7)
sh2_drc_save_sr:
   75bb4438 03e00008 jr $ra
   75bb443c ac96004c sw $s6, 76($a0)
sh2_drc_restore_sr:
   75bb4440 03e00008 jr $ra
   75bb4444 8c96004c lw $s6, 76($a0)

Program received signal SIGSEGV, Segmentation fault.
0x75a090e8 in dr_get_entry (pc=516, is_slave=1, tcache_id=0x75b7a218 <sh2s+6136>) at cpu/sh2/compiler.c:570
570 cpu/sh2/compiler.c: No such file or directory.
(gdb) bt
#0  0x75a090e8 in dr_get_entry (pc=516, is_slave=1, tcache_id=0x75b7a218 <sh2s+6136>) at cpu/sh2/compiler.c:570
#1  0x75a0bea0 in dr_lookup_block (pc=516, sh2=0x75b7a1a0 <sh2s+6016>, tcache_id=0x75b7a218 <sh2s+6136>) at cpu/sh2/compiler.c:1183
#2  0x75bb42c8 in tcache_default () from /media/data/local/home/.retroarch/cores/picodrive_libretro.so
Backtrace stopped: frame did not save the PC
(gdb)

Since the libretro-ization is already upstream, would it make sense to do a clean break with the libretro fork and just update the upstream libretro-ization? If we need a downstream fork for experimentation/debugging/whatever, we could always re-fork but do a better job of avoiding future divergence.

/off-topic

I can't believe what I'm seeing. It looks like it can't write to a statically allocated structure array.

Can I pester you a bit more? If so, please dump me the asm code of the function and the registers after the crash: x/50i dr_lookup_block x/50i dr_get_entry info reg The 2nd line will probably return an error. That's ok, it may have been inlined.

TIA. I'm really grateful for your help.

This is what I get:

Program received signal SIGSEGV, Segmentation fault.
0x74de90e8 in dr_get_entry (pc=516, is_slave=1, tcache_id=0x74f5a218 <sh2s+6136>) at cpu/sh2/compiler.c:570
570 cpu/sh2/compiler.c: No such file or directory.
(gdb) bt
#0  0x74de90e8 in dr_get_entry (pc=516, is_slave=1, tcache_id=0x74f5a218 <sh2s+6136>) at cpu/sh2/compiler.c:570
#1  0x74debea0 in dr_lookup_block (pc=516, sh2=0x74f5a1a0 <sh2s+6016>, tcache_id=0x74f5a218 <sh2s+6136>) at cpu/sh2/compiler.c:1183
#2  0x74f942c8 in tcache_default () from /media/data/local/home/.retroarch/cores/picodrive_libretro.so
Backtrace stopped: frame did not save the PC
(gdb) x/50i dr_lookup_block
   0x74debe4c <dr_lookup_block>:    lui gp,0x8
   0x74debe50 <dr_lookup_block+4>:  addiu   gp,gp,-29372
   0x74debe54 <dr_lookup_block+8>:  addu    gp,gp,t9
   0x74debe58 <dr_lookup_block+12>: addiu   sp,sp,-40
   0x74debe5c <dr_lookup_block+16>: sw  ra,36(sp)
   0x74debe60 <dr_lookup_block+20>: sw  gp,16(sp)
   0x74debe64 <dr_lookup_block+24>: sw  a0,40(sp)
   0x74debe68 <dr_lookup_block+28>: sw  a1,44(sp)
   0x74debe6c <dr_lookup_block+32>: sw  a2,48(sp)
   0x74debe70 <dr_lookup_block+36>: sw  zero,28(sp)
   0x74debe74 <dr_lookup_block+40>: sw  zero,24(sp)
   0x74debe78 <dr_lookup_block+44>: lw  v0,44(sp)
   0x74debe7c <dr_lookup_block+48>: lw  v0,1372(v0)
   0x74debe80 <dr_lookup_block+52>: lw  a0,40(sp)
   0x74debe84 <dr_lookup_block+56>: move    a1,v0
   0x74debe88 <dr_lookup_block+60>: lw  a2,48(sp)
   0x74debe8c <dr_lookup_block+64>: lw  v0,-32612(gp)
   0x74debe90 <dr_lookup_block+68>: addiu   v0,v0,-24388
   0x74debe94 <dr_lookup_block+72>: move    t9,v0
   0x74debe98 <dr_lookup_block+76>: bal 0x74de90bc <dr_get_entry>
   0x74debe9c <dr_lookup_block+80>: nop
---Type <return> to continue, or q <return> to quit---
   0x74debea0 <dr_lookup_block+84>: lw  gp,16(sp)
   0x74debea4 <dr_lookup_block+88>: sw  v0,28(sp)
   0x74debea8 <dr_lookup_block+92>: lw  v0,28(sp)
   0x74debeac <dr_lookup_block+96>: beqz    v0,0x74debec0 <dr_lookup_block+116>
   0x74debeb0 <dr_lookup_block+100>:    nop
   0x74debeb4 <dr_lookup_block+104>:    lw  v0,28(sp)
   0x74debeb8 <dr_lookup_block+108>:    lw  v0,4(v0)
   0x74debebc <dr_lookup_block+112>:    sw  v0,24(sp)
   0x74debec0 <dr_lookup_block+116>:    lw  v0,28(sp)
   0x74debec4 <dr_lookup_block+120>:    beqz    v0,0x74debee0 <dr_lookup_block+148>
   0x74debec8 <dr_lookup_block+124>:    nop
   0x74debecc <dr_lookup_block+128>:    lw  v0,28(sp)
   0x74debed0 <dr_lookup_block+132>:    lw  v0,24(v0)
   0x74debed4 <dr_lookup_block+136>:    lw  v1,28(v0)
   0x74debed8 <dr_lookup_block+140>:    addiu   v1,v1,1
   0x74debedc <dr_lookup_block+144>:    sw  v1,28(v0)
   0x74debee0 <dr_lookup_block+148>:    lw  v0,24(sp)
   0x74debee4 <dr_lookup_block+152>:    lw  ra,36(sp)
   0x74debee8 <dr_lookup_block+156>:    addiu   sp,sp,40
   0x74debeec <dr_lookup_block+160>:    jr  ra
   0x74debef0 <dr_lookup_block+164>:    nop
---Type <return> to continue, or q <return> to quit---
   0x74debef4 <dr_free_oldest_block>:   lui gp,0x8
   0x74debef8 <dr_free_oldest_block+4>: addiu   gp,gp,-29540
   0x74debefc <dr_free_oldest_block+8>: addu    gp,gp,t9
   0x74debf00 <dr_free_oldest_block+12>:    addiu   sp,sp,-40
   0x74debf04 <dr_free_oldest_block+16>:    sw  ra,36(sp)
   0x74debf08 <dr_free_oldest_block+20>:    sw  gp,16(sp)
   0x74debf0c <dr_free_oldest_block+24>:    sw  a0,40(sp)
   0x74debf10 <dr_free_oldest_block+28>:    lw  v0,40(sp)
(gdb) x/50i dr_get_entry
   0x74de90bc <dr_get_entry>:   lui gp,0x8
   0x74de90c0 <dr_get_entry+4>: addiu   gp,gp,-17708
   0x74de90c4 <dr_get_entry+8>: addu    gp,gp,t9
   0x74de90c8 <dr_get_entry+12>:    addiu   sp,sp,-40
   0x74de90cc <dr_get_entry+16>:    sw  ra,36(sp)
   0x74de90d0 <dr_get_entry+20>:    sw  gp,16(sp)
   0x74de90d4 <dr_get_entry+24>:    sw  a0,40(sp)
   0x74de90d8 <dr_get_entry+28>:    sw  a1,44(sp)
   0x74de90dc <dr_get_entry+32>:    sw  a2,48(sp)
   0x74de90e0 <dr_get_entry+36>:    lw  a0,40(sp)
   0x74de90e4 <dr_get_entry+40>:    lw  a1,44(sp)
=> 0x74de90e8 <dr_get_entry+44>:    lw  v0,-32612(gp)
   0x74de90ec <dr_get_entry+48>:    addiu   v0,v0,-24488
   0x74de90f0 <dr_get_entry+52>:    move    t9,v0
   0x74de90f4 <dr_get_entry+56>:    bal 0x74de9058 <dr_get_tcache_id>
   0x74de90f8 <dr_get_entry+60>:    nop
   0x74de90fc <dr_get_entry+64>:    lw  gp,16(sp)
   0x74de9100 <dr_get_entry+68>:    move    v1,v0
   0x74de9104 <dr_get_entry+72>:    lw  v0,48(sp)
   0x74de9108 <dr_get_entry+76>:    sw  v1,0(v0)
   0x74de910c <dr_get_entry+80>:    lw  v0,48(sp)
---Type <return> to continue, or q <return> to quit---
   0x74de9110 <dr_get_entry+84>:    lw  v1,0(v0)
   0x74de9114 <dr_get_entry+88>:    lw  v0,-32616(gp)
   0x74de9118 <dr_get_entry+92>:    sll v1,v1,0x2
   0x74de911c <dr_get_entry+96>:    addiu   v0,v0,-5564
   0x74de9120 <dr_get_entry+100>:   addu    v0,v1,v0
   0x74de9124 <dr_get_entry+104>:   lw  v1,0(v0)
   0x74de9128 <dr_get_entry+108>:   lw  v0,40(sp)
   0x74de912c <dr_get_entry+112>:   srl a0,v0,0x1
   0x74de9130 <dr_get_entry+116>:   lw  v0,48(sp)
   0x74de9134 <dr_get_entry+120>:   lw  v0,0(v0)
   0x74de9138 <dr_get_entry+124>:   beqz    v0,0x74de914c <dr_get_entry+144>
   0x74de913c <dr_get_entry+128>:   nop
   0x74de9140 <dr_get_entry+132>:   li  v0,511
   0x74de9144 <dr_get_entry+136>:   b   0x74de9150 <dr_get_entry+148>
   0x74de9148 <dr_get_entry+140>:   nop
   0x74de914c <dr_get_entry+144>:   li  v0,32767
   0x74de9150 <dr_get_entry+148>:   and v0,a0,v0
   0x74de9154 <dr_get_entry+152>:   sll v0,v0,0x2
   0x74de9158 <dr_get_entry+156>:   addu    v0,v1,v0
   0x74de915c <dr_get_entry+160>:   lw  v0,0(v0)
   0x74de9160 <dr_get_entry+164>:   sw  v0,24(sp)
---Type <return> to continue, or q <return> to quit---
   0x74de9164 <dr_get_entry+168>:   lw  v0,24(sp)
   0x74de9168 <dr_get_entry+172>:   beqz    v0,0x74de91b0 <dr_get_entry+244>
   0x74de916c <dr_get_entry+176>:   nop
   0x74de9170 <dr_get_entry+180>:   b   0x74de91a4 <dr_get_entry+232>
   0x74de9174 <dr_get_entry+184>:   nop
   0x74de9178 <dr_get_entry+188>:   lw  v0,24(sp)
   0x74de917c <dr_get_entry+192>:   lw  v1,0(v0)
   0x74de9180 <dr_get_entry+196>:   lw  v0,40(sp)
(gdb) info reg
          zero       at       v0       v1       a0       a1       a2       a3
 R0   00000000 00000000 ffffa0bc 00000101 00000204 00000001 74f5a218 00000000 
            t0       t1       t2       t3       t4       t5       t6       t7
 R8   00000210 00000000 00000258 00040000 03840000 00a80000 00000002 000004b0 
            s0       s1       s2       s3       s4       s5       s6       s7
 R16  7f923db4 00411b8c 7f9234a0 76b9de20 00000000 00000000 004f20f0 74f5a1a0 
            t8       t9       k0       k1       gp       sp       s8       ra
 R24  00000000 ffffa0bc 00000001 00000000 00075b90 7f91d358 00000000 74debea0 
        status       lo       hi badvaddr    cause       pc
      00000c13 0013cb90 00000000 0006dc2c 00800008 74de90e8 
          fcsr      fir  restart
      10800024 00330000 00000000 
(gdb)

TIA. I'm really grateful for your help.

Heh - Not as grateful as I am for your help. We'd get absolutely nowhere without an expert of your calibre to debug this. There are very few people around with your knowledge and skill set :)

And thanks also for opening my eyes to USB debugging on the RG350 - I've been using that just now to fix a long-standing frontend bug affecting fast-forward support.

@hizzlekizzle That sounds like a very reasonable idea - I'd support that!

Thank you for the disassembly. It indicates that apparently t9 is required to hold the called function's address on entry. Could you please try this:


diff --git a/cpu/drc/emit_mips.c b/cpu/drc/emit_mips.c
--- a/cpu/drc/emit_mips.c
+++ b/cpu/drc/emit_mips.c
@@ -30,6 +30,7 @@
 #define    SP      29 // stack pointer
 #define    FP      30 // frame pointer
 #define    LR      31 // link register
+#define    CR      25 // call register, must contain called function addr
 // internally used by code emitter:
 #define AT     1  // used to hold intermediate results
 #define FNZ        15 // emulated processor flags: N (bit 31) ,Z (all bits)
@@ -1516,17 +1517,20 @@ static int emith_cond_check(int cond, int *r)
 #define emith_jump_ctx_c(cond, offs) \
    emith_jump_ctx(offs)

-#define emith_call(target) \
-   emith_branch(MIPS_JAL((uintptr_t)target & 0x0fffffff))
+#define emith_call(target) do { \
+   emith_move_r_imm(CR, target); \
+   emith_branch(MIPS_JALR(LR, CR)); \
+} while (0)
 #define emith_call_cond(cond, target) \
    emith_call(target)

-#define emith_call_reg(r) \
-   emith_branch(MIPS_JALR(LR, r))
-
+#define emith_call_reg(r) do { \
+   if (r != CR) emith_move_r_r(CR, r); \
+   emith_branch(MIPS_JALR(LR, CR)); \
+} while (0)
 #define emith_call_ctx(offs) do { \
-   emith_ctx_read_ptr(AT, offs); \
-   emith_call_reg(AT); \
+   emith_ctx_read_ptr(CR, offs); \
+   emith_call_reg(CR); \
 } while (0)

 #define emith_call_cleanup()   /**/

Many thanks for the diff! It seems to fix that particular segfault, but now it crashes elsewhere:

(gdb) run
Starting program: /media/data/local/home/retroarch 
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/libthread_db.so.1".
DRC registers created, 21 host regs (4 REG, 3 STATIC, 1 CTX)
   7597d000 00802025 move $a0, $a0
sh2_drc_write8:
   7597d004 8ee6006c lw $a2, 108($s7)
   7597d008 00043e42 srl $a3, $a0, 25
   7597d00c 00073880 sll $a3, $a3, 2
   7597d010 00c70821 addu $at, $a2, $a3
   7597d014 8c270000 lw $a3, 0($at)
   7597d018 00e00008 jr $a3
   7597d01c 02e03025 move $a2, $s7
sh2_drc_write16:
   7597d020 8ee60070 lw $a2, 112($s7)
   7597d024 00043e42 srl $a3, $a0, 25
   7597d028 00073880 sll $a3, $a3, 2
   7597d02c 00c70821 addu $at, $a2, $a3
   7597d030 8c270000 lw $a3, 0($at)
   7597d034 00e00008 jr $a3
   7597d038 02e03025 move $a2, $s7
sh2_drc_write32:
   7597d03c 8ee60074 lw $a2, 116($s7)
   7597d040 00043e42 srl $a3, $a0, 25
   7597d044 00073880 sll $a3, $a3, 2
   7597d048 00c70821 addu $at, $a2, $a3
   7597d04c 8c270000 lw $a3, 0($at)
   7597d050 00e00008 jr $a3
   7597d054 02e03025 move $a2, $s7
sh2_drc_read8:
   7597d058 8ee50060 lw $a1, 96($s7)
   7597d05c 00043e42 srl $a3, $a0, 25
   7597d060 000708c0 sll $at, $a3, 3
   7597d064 00a12821 addu $a1, $a1, $at
   7597d068 8ca60000 lw $a2, 0($a1)
   7597d06c 8ca70004 lw $a3, 4($a1)
   7597d070 00c67821 addu $t7, $a2, $a2
   7597d074 01e6c02b sltu $t8, $t7, $a2
   7597d078 17000006 bne $t8, $zero, 0x7597d094 <unknown>
   7597d07c 01e03025 move $a2, $t7
   7597d080 00872024 and $a0, $a0, $a3
   7597d084 38840001 xori $a0, $a0, 0x1
   7597d088 00c40821 addu $at, $a2, $a0
   7597d08c 03e00008 jr $ra
   7597d090 80220000 lb $v0, 0($at)
   7597d094 00c00008 jr $a2
   7597d098 02e02825 move $a1, $s7
sh2_drc_read16:
   7597d09c 8ee50064 lw $a1, 100($s7)
   7597d0a0 00043e42 srl $a3, $a0, 25
   7597d0a4 000708c0 sll $at, $a3, 3
   7597d0a8 00a12821 addu $a1, $a1, $at
   7597d0ac 8ca60000 lw $a2, 0($a1)
   7597d0b0 8ca70004 lw $a3, 4($a1)
   7597d0b4 00c67821 addu $t7, $a2, $a2
   7597d0b8 01e6c02b sltu $t8, $t7, $a2
   7597d0bc 17000005 bne $t8, $zero, 0x7597d0d4 <unknown>
   7597d0c0 01e03025 move $a2, $t7
   7597d0c4 00872024 and $a0, $a0, $a3
   7597d0c8 00c40821 addu $at, $a2, $a0
   7597d0cc 03e00008 jr $ra
   7597d0d0 84220000 lh $v0, 0($at)
   7597d0d4 00c00008 jr $a2
   7597d0d8 02e02825 move $a1, $s7
sh2_drc_read32:
   7597d0dc 8ee50068 lw $a1, 104($s7)
   7597d0e0 00043e42 srl $a3, $a0, 25
   7597d0e4 000708c0 sll $at, $a3, 3
   7597d0e8 00a12821 addu $a1, $a1, $at
   7597d0ec 8ca60000 lw $a2, 0($a1)
   7597d0f0 8ca70004 lw $a3, 4($a1)
   7597d0f4 00c67821 addu $t7, $a2, $a2
   7597d0f8 01e6c02b sltu $t8, $t7, $a2
   7597d0fc 17000008 bne $t8, $zero, 0x7597d120 <unknown>
   7597d100 01e03025 move $a2, $t7
   7597d104 00872024 and $a0, $a0, $a3
   7597d108 00c40821 addu $at, $a2, $a0
   7597d10c 8c220000 lw $v0, 0($at)
   7597d110 00020c00 sll $at, $v0, 16
   7597d114 00021402 srl $v0, $v0, 16
   7597d118 03e00008 jr $ra
   7597d11c 00411025 or $v0, $v0, $at
   7597d120 00c00008 jr $a2
   7597d124 02e02825 move $a1, $s7
sh2_drc_read8_poll:
   7597d128 8ee50060 lw $a1, 96($s7)
   7597d12c 00043e42 srl $a3, $a0, 25
   7597d130 000708c0 sll $at, $a3, 3
   7597d134 00a12821 addu $a1, $a1, $at
   7597d138 8ca60000 lw $a2, 0($a1)
   7597d13c 8ca70004 lw $a3, 4($a1)
   7597d140 00c67821 addu $t7, $a2, $a2
   7597d144 01e6c02b sltu $t8, $t7, $a2
   7597d148 13000003 beq $t8, $zero, 0x7597d158 <unknown>
   7597d14c 01e03025 move $a2, $t7
   7597d150 00c00008 jr $a2
   7597d154 02e02825 move $a1, $s7
   7597d158 00872824 and $a1, $a0, $a3
   7597d15c 38a50001 xori $a1, $a1, 0x1
   7597d160 00c50821 addu $at, $a2, $a1
   7597d164 80250000 lb $a1, 0($at)
   7597d168 27bdffe8 addiu $sp, $sp, -24
   7597d16c afbf0014 sw $ra, 20($sp)
   7597d170 afa50010 sw $a1, 16($sp)
   7597d174 3c19756c lui $t9, 0x756c
   7597d178 373978c4 ori $t9, $t9, 0x78c4
   7597d17c 0320f809 jalr $ra, $t9
   7597d180 02e03025 move $a2, $s7
   7597d184 8fa50010 lw $a1, 16($sp)
   7597d188 8fbf0014 lw $ra, 20($sp)
   7597d18c 03e00008 jr $ra
   7597d190 27bd0018 addiu $sp, $sp, 24
sh2_drc_read16_poll:
   7597d194 8ee50064 lw $a1, 100($s7)
   7597d198 00043e42 srl $a3, $a0, 25
   7597d19c 000708c0 sll $at, $a3, 3
   7597d1a0 00a12821 addu $a1, $a1, $at
   7597d1a4 8ca60000 lw $a2, 0($a1)
   7597d1a8 8ca70004 lw $a3, 4($a1)
   7597d1ac 00c67821 addu $t7, $a2, $a2
   7597d1b0 01e6c02b sltu $t8, $t7, $a2
   7597d1b4 13000003 beq $t8, $zero, 0x7597d1c4 <unknown>
   7597d1b8 01e03025 move $a2, $t7
   7597d1bc 00c00008 jr $a2
   7597d1c0 02e02825 move $a1, $s7
   7597d1c4 00872824 and $a1, $a0, $a3
   7597d1c8 00c50821 addu $at, $a2, $a1
   7597d1cc 84250000 lh $a1, 0($at)
   7597d1d0 27bdffe8 addiu $sp, $sp, -24
   7597d1d4 afbf0014 sw $ra, 20($sp)
   7597d1d8 afa50010 sw $a1, 16($sp)
   7597d1dc 3c19756c lui $t9, 0x756c
   7597d1e0 3739796c ori $t9, $t9, 0x796c
   7597d1e4 0320f809 jalr $ra, $t9
   7597d1e8 02e03025 move $a2, $s7
   7597d1ec 8fa50010 lw $a1, 16($sp)
   7597d1f0 8fbf0014 lw $ra, 20($sp)
   7597d1f4 03e00008 jr $ra
   7597d1f8 27bd0018 addiu $sp, $sp, 24
sh2_drc_read32_poll:
   7597d1fc 8ee50068 lw $a1, 104($s7)
   7597d200 00043e42 srl $a3, $a0, 25
   7597d204 000708c0 sll $at, $a3, 3
   7597d208 00a12821 addu $a1, $a1, $at
   7597d20c 8ca60000 lw $a2, 0($a1)
   7597d210 8ca70004 lw $a3, 4($a1)
   7597d214 00c67821 addu $t7, $a2, $a2
   7597d218 01e6c02b sltu $t8, $t7, $a2
   7597d21c 13000003 beq $t8, $zero, 0x7597d22c <unknown>
   7597d220 01e03025 move $a2, $t7
   7597d224 00c00008 jr $a2
   7597d228 02e02825 move $a1, $s7
   7597d22c 00872824 and $a1, $a0, $a3
   7597d230 00c50821 addu $at, $a2, $a1
   7597d234 8c250000 lw $a1, 0($at)
   7597d238 00050c00 sll $at, $a1, 16
   7597d23c 00052c02 srl $a1, $a1, 16
   7597d240 00a12825 or $a1, $a1, $at
   7597d244 27bdffe8 addiu $sp, $sp, -24
   7597d248 afbf0014 sw $ra, 20($sp)
   7597d24c afa50010 sw $a1, 16($sp)
   7597d250 3c19756c lui $t9, 0x756c
   7597d254 37397b28 ori $t9, $t9, 0x7b28
   7597d258 0320f809 jalr $ra, $t9
   7597d25c 02e03025 move $a2, $s7
   7597d260 8fa50010 lw $a1, 16($sp)
   7597d264 8fbf0014 lw $ra, 20($sp)
   7597d268 03e00008 jr $ra
   7597d26c 27bd0018 addiu $sp, $sp, 24
sh2_drc_exit:
   7597d270 aee40040 sw $a0, 64($s7)
   7597d274 aef50000 sw $s5, 0($s7)
   7597d278 aef40004 sw $s4, 4($s7)
   7597d27c aef6004c sw $s6, 76($s7)
   7597d280 8fb00014 lw $s0, 20($sp)
   7597d284 8fb10018 lw $s1, 24($sp)
   7597d288 8fb2001c lw $s2, 28($sp)
   7597d28c 8fb30020 lw $s3, 32($sp)
   7597d290 8fb40024 lw $s4, 36($sp)
   7597d294 8fb50028 lw $s5, 40($sp)
   7597d298 8fb6002c lw $s6, 44($sp)
   7597d29c 8fb70030 lw $s7, 48($sp)
   7597d2a0 8fbc0034 lw $gp, 52($sp)
   7597d2a4 8fbe0038 lw $fp, 56($sp)
   7597d2a8 8fbf003c lw $ra, 60($sp)
   7597d2ac 03e00008 jr $ra
   7597d2b0 27bd0040 addiu $sp, $sp, 64
sh2_drc_dispatcher:
   7597d2b4 308503f8 andi $a1, $a0, 0x3f8
   7597d2b8 02e52821 addu $a1, $s7, $a1
   7597d2bc 8ca60138 lw $a2, 312($a1)
   7597d2c0 14c40004 bne $a2, $a0, 0x7597d2d4 <unknown>
   7597d2c4 aee40040 sw $a0, 64($s7)
   7597d2c8 8ca2013c lw $v0, 316($a1)
   7597d2cc 00400008 jr $v0
   7597d2d0 00000000 nop
   7597d2d4 02e02825 move $a1, $s7
   7597d2d8 3c19757d lui $t9, 0x757d
   7597d2dc 37394e4c ori $t9, $t9, 0x4e4c
   7597d2e0 0320f809 jalr $ra, $t9
   7597d2e4 26e60078 addiu $a2, $s7, 120
   7597d2e8 10400007 beq $v0, $zero, 0x7597d308 <unknown>
   7597d2ec 00000000 nop
   7597d2f0 8ee60040 lw $a2, 64($s7)
   7597d2f4 30c503f8 andi $a1, $a2, 0x3f8
   7597d2f8 02e52821 addu $a1, $s7, $a1
   7597d2fc aca60138 sw $a2, 312($a1)
   7597d300 00400008 jr $v0
   7597d304 aca2013c sw $v0, 316($a1)
   7597d308 02e02025 move $a0, $s7
   7597d30c 3c19757e lui $t9, 0x757e
   7597d310 37396f1c ori $t9, $t9, 0x6f1c
   7597d314 0320f809 jalr $ra, $t9
   7597d318 8ee50078 lw $a1, 120($s7)
   7597d31c 10400003 beq $v0, $zero, 0x7597d32c <unknown>
   7597d320 00000000 nop
   7597d324 00400008 jr $v0
   7597d328 00000000 nop
   7597d32c 3c19757d lui $t9, 0x757d
   7597d330 37395d84 ori $t9, $t9, 0x5d84
   7597d334 0320f809 jalr $ra, $t9
   7597d338 00000000 nop
sh2_drc_dispatcher_call:
   7597d33c 8ee600b4 lw $a2, 180($s7)
   7597d340 24c60008 addiu $a2, $a2, 8
   7597d344 30c60078 andi $a2, $a2, 0x78
   7597d348 aee600b4 sw $a2, 180($s7)
   7597d34c 02e63821 addu $a3, $s7, $a2
   7597d350 8ee60048 lw $a2, 72($s7)
   7597d354 00bf2821 addu $a1, $a1, $ra
   7597d358 ace500bc sw $a1, 188($a3)
   7597d35c 03e00008 jr $ra
   7597d360 ace600b8 sw $a2, 184($a3)
sh2_drc_dispatcher_return:
   7597d364 8ee600b4 lw $a2, 180($s7)
   7597d368 02e62821 addu $a1, $s7, $a2
   7597d36c 8ca700b8 lw $a3, 184($a1)
   7597d370 1487ffd0 bne $a0, $a3, 0x7597d2b4 <sh2_drc_dispatcher>
   7597d374 00000000 nop
   7597d378 8ca400bc lw $a0, 188($a1)
   7597d37c 24c6fff8 addiu $a2, $a2, -8
   7597d380 30c60078 andi $a2, $a2, 0x78
   7597d384 00800008 jr $a0
   7597d388 aee600b4 sw $a2, 180($s7)
sh2_drc_test_irq:
   7597d38c 8ee50548 lw $a1, 1352($s7)
   7597d390 00162102 srl $a0, $s6, 4
   7597d394 3084000f andi $a0, $a0, 0xf
   7597d398 0085082a slt $at, $a0, $a1
   7597d39c 14200003 bne $at, $zero, 0x7597d3ac <unknown>
   7597d3a0 00000000 nop
   7597d3a4 03e00008 jr $ra
   7597d3a8 00000000 nop
   7597d3ac 8ef0003c lw $s0, 60($s7)
   7597d3b0 2610fff8 addiu $s0, $s0, -8
   7597d3b4 aef0003c sw $s0, 60($s7)
   7597d3b8 26040004 addiu $a0, $s0, 4
   7597d3bc 02c02825 move $a1, $s6
   7597d3c0 30a503ff andi $a1, $a1, 0x3ff
   7597d3c4 3c19756c lui $t9, 0x756c
   7597d3c8 3739d538 ori $t9, $t9, 0xd538
   7597d3cc 0320f809 jalr $ra, $t9
   7597d3d0 02e03025 move $a2, $s7
   7597d3d4 02002025 move $a0, $s0
   7597d3d8 8ee50040 lw $a1, 64($s7)
   7597d3dc 3c19756c lui $t9, 0x756c
   7597d3e0 3739d538 ori $t9, $t9, 0xd538
   7597d3e4 0320f809 jalr $ra, $t9
   7597d3e8 02e03025 move $a2, $s7
   7597d3ec 8ee50548 lw $a1, 1352($s7)
   7597d3f0 2401ff0f addiu $at, $zero, -241
   7597d3f4 02c1b024 and $s6, $s6, $at
   7597d3f8 00050900 sll $at, $a1, 4
   7597d3fc 02c1b025 or $s6, $s6, $at
   7597d400 3401d000 ori $at, $zero, 0xd000
   7597d404 02c1b023 subu $s6, $s6, $at
   7597d408 8ef90558 lw $t9, 1368($s7)
   7597d40c 0320f809 jalr $ra, $t9
   7597d410 02e02025 move $a0, $s7
   7597d414 8ee50054 lw $a1, 84($s7)
   7597d418 00020880 sll $at, $v0, 2
   7597d41c 3c197597 lui $t9, 0x7597
   7597d420 3739d0dc ori $t9, $t9, 0xd0dc
   7597d424 0320f809 jalr $ra, $t9
   7597d428 00a12021 addu $a0, $a1, $at
   7597d42c 0965f4ad j 0x7597d2b4 <sh2_drc_dispatcher>
   7597d430 00402025 move $a0, $v0
sh2_drc_entry:
   7597d434 27bdffc0 addiu $sp, $sp, -64
   7597d438 afbf003c sw $ra, 60($sp)
   7597d43c afbe0038 sw $fp, 56($sp)
   7597d440 afbc0034 sw $gp, 52($sp)
   7597d444 afb70030 sw $s7, 48($sp)
   7597d448 afb6002c sw $s6, 44($sp)
   7597d44c afb50028 sw $s5, 40($sp)
   7597d450 afb40024 sw $s4, 36($sp)
   7597d454 afb30020 sw $s3, 32($sp)
   7597d458 afb2001c sw $s2, 28($sp)
   7597d45c afb10018 sw $s1, 24($sp)
   7597d460 afb00014 sw $s0, 20($sp)
   7597d464 0080b825 move $s7, $a0
   7597d468 8ef50000 lw $s5, 0($s7)
   7597d46c 8ef40004 lw $s4, 4($s7)
   7597d470 3c197597 lui $t9, 0x7597
   7597d474 3739d38c ori $t9, $t9, 0xd38c
   7597d478 0320f809 jalr $ra, $t9
   7597d47c 8ef6004c lw $s6, 76($s7)
   7597d480 0965f4ad j 0x7597d2b4 <sh2_drc_dispatcher>
   7597d484 8ee40040 lw $a0, 64($s7)
sh2_drc_save_sr:
   7597d488 03e00008 jr $ra
   7597d48c ac96004c sw $s6, 76($a0)
sh2_drc_restore_sr:
   7597d490 03e00008 jr $ra
   7597d494 8c96004c lw $s6, 76($a0)
   75d5d000 1ac0ffff blez $s6, 0x75d5d000 <unknown>
   75d5d004 00000000 nop
*00000204 d106 MOV.L   @($18,PC),R1  ; @$00000220
   75d5d008 3c197597 lui $t9, 0x7597
   75d5d00c 3739d0dc ori $t9, $t9, 0xd0dc
   75d5d010 0320f809 jalr $ra, $t9
   75d5d014 24040220 addiu $a0, $zero, 544
 00000206 d208 MOV.L   @($20,PC),R2  ; @$00000228
   75d5d018 0040a025 move $s4, $v0
   75d5d01c 3c197597 lui $t9, 0x7597
   75d5d020 3739d0dc ori $t9, $t9, 0xd0dc
   75d5d024 0320f809 jalr $ra, $t9
   75d5d028 24040228 addiu $a0, $zero, 552
   75d5d02c 26d6e000 addiu $s6, $s6, 0xffffe000
   75d5d030 aee20008 sw $v0, 8($s7)
   75d5d034 1ac0ffff blez $s6, 0x75d5d034 <unknown>
   75d5d038 00000000 nop
=00000208 c608 MOV.L   @($0020,GBR),R0
   75d5d03c 8ee40050 lw $a0, 80($s7)
   75d5d040 3c197597 lui $t9, 0x7597
   75d5d044 3739d1fc ori $t9, $t9, 0xd1fc
   75d5d048 0320f809 jalr $ra, $t9
   75d5d04c 24840020 addiu $a0, $a0, 32
.0000020a 3100 CMP/EQ  R0,R1
   75d5d050 0040a825 move $s5, $v0
   75d5d054 2401fffe addiu $at, $zero, -2
.0000020c 8bfc BF      $00000208
   75d5d058 02c1b024 and $s6, $s6, $at
   75d5d05c 02950826 xor $at, $s4, $s5
   75d5d060 2c210001 sltiu $at, $at, 1
   75d5d064 02c1b025 or $s6, $s6, $at
   75d5d068 26d6b000 addiu $s6, $s6, 0xffffb000
   75d5d06c 32cf0001 andi $t7, $s6, 0x1
   75d5d070 11e0fff0 beq $t7, $zero, 0x75d5d034 <unknown>
   75d5d074 00000000 nop
 0000020e c400 MOV.B   @($00,GBR),R0
   75d5d078 3c197597 lui $t9, 0x7597
   75d5d07c 3739d058 ori $t9, $t9, 0xd058
   75d5d080 0320f809 jalr $ra, $t9
   75d5d084 8ee40050 lw $a0, 80($s7)
 00000210 c801 TST     #$01,R0
   75d5d088 2401fffe addiu $at, $zero, -2
 00000212 d004 MOV.L   @($10,PC),R0  ; @$00000224
   75d5d08c 02c1b024 and $s6, $s6, $at
   75d5d090 304f0001 andi $t7, $v0, 0x1
   75d5d094 2de10001 sltiu $at, $t7, 1
   75d5d098 02c1b025 or $s6, $s6, $at
   75d5d09c 24040224 addiu $a0, $zero, 548
   75d5d0a0 3c197597 lui $t9, 0x7597
   75d5d0a4 3739d0dc ori $t9, $t9, 0xd0dc
   75d5d0a8 0320f809 jalr $ra, $t9
   75d5d0ac 0040a825 move $s5, $v0
 00000214 8b0a BF      $0000022c
   75d5d0b0 26d6c000 addiu $s6, $s6, 0xffffc000
   75d5d0b4 32cf0001 andi $t7, $s6, 0x1
   75d5d0b8 11e00000 beq $t7, $zero, 0x75d5d0bc <unknown>
   75d5d0bc 0040a825 move $s5, $v0
 00000216 c209 MOV.L   R0,@($0024,GBR)
   75d5d0c0 02a02825 move $a1, $s5
   75d5d0c4 8ee40050 lw $a0, 80($s7)
   75d5d0c8 3c197597 lui $t9, 0x7597
   75d5d0cc 3739d03c ori $t9, $t9, 0xd03c
   75d5d0d0 0320f809 jalr $ra, $t9
   75d5d0d4 24840024 addiu $a0, $a0, 36
 00000218 6822 MOV.L   @R2,R8
   75d5d0d8 3c197597 lui $t9, 0x7597
   75d5d0dc 3739d0dc ori $t9, $t9, 0xd0dc
   75d5d0e0 0320f809 jalr $ra, $t9
   75d5d0e4 8ee40008 lw $a0, 8($s7)
 0000021a 482b JMP     R8
 0000021c 0009 NOP
   75d5d0e8 aee20020 sw $v0, 32($s7)
   75d5d0ec 00402025 move $a0, $v0
   75d5d0f0 26d6d000 addiu $s6, $s6, 0xffffd000
   75d5d0f4 0965f4ad j 0x7597d2b4 <sh2_drc_dispatcher>
   75d5d0f8 aee20040 sw $v0, 64($s7)
   75d5d0fc 0965f49c j 0x7597d270 <sh2_drc_exit>
   75d5d100 24040204 addiu $a0, $zero, 516
   75d5d104 0965f49c j 0x7597d270 <sh2_drc_exit>
   75d5d108 24040208 addiu $a0, $zero, 520
   75d5d10c 0965f4ad j 0x7597d2b4 <sh2_drc_dispatcher>
   75d5d110 2404022c addiu $a0, $zero, 556

Program received signal SIGSEGV, Segmentation fault.
sh2_read16_cs0 (a=544, sh2=0x759431a0 <sh2s+6016>) at pico/32x/memory.c:1535
1535    pico/32x/memory.c: No such file or directory.
(gdb) bt
#0  sh2_read16_cs0 (a=544, sh2=0x759431a0 <sh2s+6016>) at pico/32x/memory.c:1535
#1  0x756cc06c in sh2_read32_cs0 (a=544, sh2=0x759431a0 <sh2s+6016>) at pico/32x/memory.c:1563
#2  0x75d5d018 in tcache_default () from /media/data/local/home/.retroarch/cores/picodrive_libretro.so
Backtrace stopped: frame did not save the PC
(gdb) x/50i sh2_read16_cs0
   0x756cbd00 <sh2_read16_cs0>: lui gp,0x18
   0x756cbd04 <sh2_read16_cs0+4>:   addiu   gp,gp,7824
   0x756cbd08 <sh2_read16_cs0+8>:   addu    gp,gp,t9
   0x756cbd0c <sh2_read16_cs0+12>:  addiu   sp,sp,-40
   0x756cbd10 <sh2_read16_cs0+16>:  sw  ra,36(sp)
   0x756cbd14 <sh2_read16_cs0+20>:  sw  gp,16(sp)
   0x756cbd18 <sh2_read16_cs0+24>:  sw  a0,40(sp)
   0x756cbd1c <sh2_read16_cs0+28>:  sw  a1,44(sp)
   0x756cbd20 <sh2_read16_cs0+32>:  sw  zero,24(sp)
   0x756cbd24 <sh2_read16_cs0+36>:  lw  v0,44(sp)
   0x756cbd28 <sh2_read16_cs0+40>:  lw  v0,164(v0)
   0x756cbd2c <sh2_read16_cs0+44>:  andi    v0,v0,0x100
   0x756cbd30 <sh2_read16_cs0+48>:  sltu    v0,zero,v0
   0x756cbd34 <sh2_read16_cs0+52>:  andi    v0,v0,0xff
   0x756cbd38 <sh2_read16_cs0+56>:  beqz    v0,0x756cbd50 <sh2_read16_cs0+80>
   0x756cbd3c <sh2_read16_cs0+60>:  nop
   0x756cbd40 <sh2_read16_cs0+64>:  move    v0,s6
   0x756cbd44 <sh2_read16_cs0+68>:  move    v1,v0
   0x756cbd48 <sh2_read16_cs0+72>:  lw  v0,44(sp)
   0x756cbd4c <sh2_read16_cs0+76>:  sw  v1,76(v0)
   0x756cbd50 <sh2_read16_cs0+80>:  lw  v0,44(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cbd54 <sh2_read16_cs0+84>:  lw  v0,76(v0)
   0x756cbd58 <sh2_read16_cs0+88>:  addiu   v1,v0,-8192
   0x756cbd5c <sh2_read16_cs0+92>:  lw  v0,44(sp)
   0x756cbd60 <sh2_read16_cs0+96>:  sw  v1,76(v0)
   0x756cbd64 <sh2_read16_cs0+100>: lw  v1,40(sp)
   0x756cbd68 <sh2_read16_cs0+104>: lui v0,0x3
   0x756cbd6c <sh2_read16_cs0+108>: ori v0,v0,0xffc0
   0x756cbd70 <sh2_read16_cs0+112>: and v1,v1,v0
   0x756cbd74 <sh2_read16_cs0+116>: li  v0,16384
   0x756cbd78 <sh2_read16_cs0+120>: bne v1,v0,0x756cbdc8 <sh2_read16_cs0+200>
   0x756cbd7c <sh2_read16_cs0+124>: nop
   0x756cbd80 <sh2_read16_cs0+128>: lw  a0,40(sp)
   0x756cbd84 <sh2_read16_cs0+132>: lw  a1,44(sp)
   0x756cbd88 <sh2_read16_cs0+136>: lw  v0,-32696(gp)
   0x756cbd8c <sh2_read16_cs0+140>: addiu   v0,v0,4328
   0x756cbd90 <sh2_read16_cs0+144>: move    t9,v0
   0x756cbd94 <sh2_read16_cs0+148>: bal 0x756c90e8 <p32x_sh2reg_read16>
   0x756cbd98 <sh2_read16_cs0+152>: nop
   0x756cbd9c <sh2_read16_cs0+156>: lw  gp,16(sp)
   0x756cbda0 <sh2_read16_cs0+160>: sw  v0,24(sp)
   0x756cbda4 <sh2_read16_cs0+164>: lw  v0,40(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cbda8 <sh2_read16_cs0+168>: andi    v1,v0,0x30
   0x756cbdac <sh2_read16_cs0+172>: li  v0,48
   0x756cbdb0 <sh2_read16_cs0+176>: bne v1,v0,0x756cbdc0 <sh2_read16_cs0+192>
   0x756cbdb4 <sh2_read16_cs0+180>: nop
   0x756cbdb8 <sh2_read16_cs0+184>: b   0x756cbf58 <sh2_read16_cs0+600>
   0x756cbdbc <sh2_read16_cs0+188>: nop
   0x756cbdc0 <sh2_read16_cs0+192>: b   0x756cbf58 <sh2_read16_cs0+600>
   0x756cbdc4 <sh2_read16_cs0+196>: nop
(gdb) x/501 sh2_read32_cs0
   0x756cc030 <sh2_read32_cs0>: lui gp,0x18
   0x756cc034 <sh2_read32_cs0+4>:   addiu   gp,gp,7008
   0x756cc038 <sh2_read32_cs0+8>:   addu    gp,gp,t9
   0x756cc03c <sh2_read32_cs0+12>:  addiu   sp,sp,-40
   0x756cc040 <sh2_read32_cs0+16>:  sw  ra,36(sp)
   0x756cc044 <sh2_read32_cs0+20>:  sw  gp,16(sp)
   0x756cc048 <sh2_read32_cs0+24>:  sw  a0,40(sp)
   0x756cc04c <sh2_read32_cs0+28>:  sw  a1,44(sp)
   0x756cc050 <sh2_read32_cs0+32>:  lw  a0,40(sp)
   0x756cc054 <sh2_read32_cs0+36>:  lw  a1,44(sp)
   0x756cc058 <sh2_read32_cs0+40>:  lw  v0,-32696(gp)
   0x756cc05c <sh2_read32_cs0+44>:  addiu   v0,v0,15616
   0x756cc060 <sh2_read32_cs0+48>:  move    t9,v0
   0x756cc064 <sh2_read32_cs0+52>:  bal 0x756cbd00 <sh2_read16_cs0>
   0x756cc068 <sh2_read32_cs0+56>:  nop
   0x756cc06c <sh2_read32_cs0+60>:  lw  gp,16(sp)
   0x756cc070 <sh2_read32_cs0+64>:  sll v0,v0,0x10
   0x756cc074 <sh2_read32_cs0+68>:  sw  v0,24(sp)
   0x756cc078 <sh2_read32_cs0+72>:  lw  v0,40(sp)
   0x756cc07c <sh2_read32_cs0+76>:  addiu   v0,v0,2
   0x756cc080 <sh2_read32_cs0+80>:  move    a0,v0
---Type <return> to continue, or q <return> to quit---
   0x756cc084 <sh2_read32_cs0+84>:  lw  a1,44(sp)
   0x756cc088 <sh2_read32_cs0+88>:  lw  v0,-32696(gp)
   0x756cc08c <sh2_read32_cs0+92>:  addiu   v0,v0,15616
   0x756cc090 <sh2_read32_cs0+96>:  move    t9,v0
   0x756cc094 <sh2_read32_cs0+100>: bal 0x756cbd00 <sh2_read16_cs0>
   0x756cc098 <sh2_read32_cs0+104>: nop
   0x756cc09c <sh2_read32_cs0+108>: lw  gp,16(sp)
   0x756cc0a0 <sh2_read32_cs0+112>: sll v0,v0,0x10
   0x756cc0a4 <sh2_read32_cs0+116>: sw  v0,28(sp)
   0x756cc0a8 <sh2_read32_cs0+120>: lw  v0,28(sp)
   0x756cc0ac <sh2_read32_cs0+124>: srl v1,v0,0x10
   0x756cc0b0 <sh2_read32_cs0+128>: lw  v0,24(sp)
   0x756cc0b4 <sh2_read32_cs0+132>: or  v0,v1,v0
   0x756cc0b8 <sh2_read32_cs0+136>: lw  ra,36(sp)
   0x756cc0bc <sh2_read32_cs0+140>: addiu   sp,sp,40
   0x756cc0c0 <sh2_read32_cs0+144>: jr  ra
   0x756cc0c4 <sh2_read32_cs0+148>: nop
   0x756cc0c8 <sh2_read32_rom>: lui gp,0x18
   0x756cc0cc <sh2_read32_rom+4>:   addiu   gp,gp,6856
   0x756cc0d0 <sh2_read32_rom+8>:   addu    gp,gp,t9
   0x756cc0d4 <sh2_read32_rom+12>:  addiu   sp,sp,-24
---Type <return> to continue, or q <return> to quit---
   0x756cc0d8 <sh2_read32_rom+16>:  sw  gp,0(sp)
   0x756cc0dc <sh2_read32_rom+20>:  sw  a0,24(sp)
   0x756cc0e0 <sh2_read32_rom+24>:  sw  a1,28(sp)
   0x756cc0e4 <sh2_read32_rom+28>:  lw  v0,24(sp)
   0x756cc0e8 <sh2_read32_rom+32>:  srl v0,v0,0x13
   0x756cc0ec <sh2_read32_rom+36>:  andi    v0,v0,0x7
   0x756cc0f0 <sh2_read32_rom+40>:  lw  v1,-30364(gp)
   0x756cc0f4 <sh2_read32_rom+44>:  addu    v0,v1,v0
   0x756cc0f8 <sh2_read32_rom+48>:  lbu v0,0(v0)
   0x756cc0fc <sh2_read32_rom+52>:  sll v0,v0,0x13
   0x756cc100 <sh2_read32_rom+56>:  sw  v0,8(sp)
   0x756cc104 <sh2_read32_rom+60>:  lw  v0,28(sp)
   0x756cc108 <sh2_read32_rom+64>:  lw  v0,140(v0)
   0x756cc10c <sh2_read32_rom+68>:  sw  v0,12(sp)
   0x756cc110 <sh2_read32_rom+72>:  lw  v1,24(sp)
   0x756cc114 <sh2_read32_rom+76>:  lui v0,0x7
   0x756cc118 <sh2_read32_rom+80>:  ori v0,v0,0xfffc
   0x756cc11c <sh2_read32_rom+84>:  and v1,v1,v0
   0x756cc120 <sh2_read32_rom+88>:  lw  v0,8(sp)
   0x756cc124 <sh2_read32_rom+92>:  addu    v0,v1,v0
   0x756cc128 <sh2_read32_rom+96>:  srl v0,v0,0x2
---Type <return> to continue, or q <return> to quit---
   0x756cc12c <sh2_read32_rom+100>: sll v0,v0,0x2
   0x756cc130 <sh2_read32_rom+104>: lw  v1,12(sp)
   0x756cc134 <sh2_read32_rom+108>: addu    v0,v1,v0
   0x756cc138 <sh2_read32_rom+112>: lw  v0,0(v0)
   0x756cc13c <sh2_read32_rom+116>: sw  v0,16(sp)
   0x756cc140 <sh2_read32_rom+120>: lw  v0,16(sp)
   0x756cc144 <sh2_read32_rom+124>: sll v1,v0,0x10
   0x756cc148 <sh2_read32_rom+128>: srl v0,v0,0x10
   0x756cc14c <sh2_read32_rom+132>: or  v0,v0,v1
   0x756cc150 <sh2_read32_rom+136>: addiu   sp,sp,24
   0x756cc154 <sh2_read32_rom+140>: jr  ra
   0x756cc158 <sh2_read32_rom+144>: nop
   0x756cc15c <sh2_sdram_poll>: lui gp,0x18
   0x756cc160 <sh2_sdram_poll+4>:   addiu   gp,gp,6708
   0x756cc164 <sh2_sdram_poll+8>:   addu    gp,gp,t9
   0x756cc168 <sh2_sdram_poll+12>:  addiu   sp,sp,-40
   0x756cc16c <sh2_sdram_poll+16>:  sw  ra,36(sp)
   0x756cc170 <sh2_sdram_poll+20>:  sw  gp,16(sp)
   0x756cc174 <sh2_sdram_poll+24>:  sw  a0,40(sp)
   0x756cc178 <sh2_sdram_poll+28>:  sw  a1,44(sp)
   0x756cc17c <sh2_sdram_poll+32>:  sw  a2,48(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cc180 <sh2_sdram_poll+36>:  lw  a0,48(sp)
   0x756cc184 <sh2_sdram_poll+40>:  lw  a0,164(a0)
   0x756cc188 <sh2_sdram_poll+44>:  andi    a0,a0,0x100
   0x756cc18c <sh2_sdram_poll+48>:  sltu    a0,zero,a0
   0x756cc190 <sh2_sdram_poll+52>:  andi    a0,a0,0xff
   0x756cc194 <sh2_sdram_poll+56>:  beqz    a0,0x756cc1ac <sh2_sdram_poll+80>
   0x756cc198 <sh2_sdram_poll+60>:  nop
   0x756cc19c <sh2_sdram_poll+64>:  move    a0,s6
   0x756cc1a0 <sh2_sdram_poll+68>:  move    a1,a0
   0x756cc1a4 <sh2_sdram_poll+72>:  lw  a0,48(sp)
   0x756cc1a8 <sh2_sdram_poll+76>:  sw  a1,76(a0)
   0x756cc1ac <sh2_sdram_poll+80>:  lw  a0,48(sp)
   0x756cc1b0 <sh2_sdram_poll+84>:  lw  a0,1388(a0)
   0x756cc1b4 <sh2_sdram_poll+88>:  lw  a1,48(sp)
   0x756cc1b8 <sh2_sdram_poll+92>:  lw  a1,1376(a1)
   0x756cc1bc <sh2_sdram_poll+96>:  move    a2,a1
   0x756cc1c0 <sh2_sdram_poll+100>: lw  a1,48(sp)
   0x756cc1c4 <sh2_sdram_poll+104>: lw  a1,76(a1)
   0x756cc1c8 <sh2_sdram_poll+108>: sra a1,a1,0xc
   0x756cc1cc <sh2_sdram_poll+112>: subu    a1,a2,a1
   0x756cc1d0 <sh2_sdram_poll+116>: addiu   a1,a1,3
---Type <return> to continue, or q <return> to quit---
   0x756cc1d4 <sh2_sdram_poll+120>: move    t2,a1
   0x756cc1d8 <sh2_sdram_poll+124>: move    t3,zero
   0x756cc1dc <sh2_sdram_poll+128>: lw  a1,48(sp)
   0x756cc1e0 <sh2_sdram_poll+132>: lw  a1,1396(a1)
   0x756cc1e4 <sh2_sdram_poll+136>: move    v0,a1
   0x756cc1e8 <sh2_sdram_poll+140>: move    v1,zero
   0x756cc1ec <sh2_sdram_poll+144>: mul a2,t3,v0
   0x756cc1f0 <sh2_sdram_poll+148>: mul a1,v1,t2
   0x756cc1f4 <sh2_sdram_poll+152>: addu    a1,a2,a1
   0x756cc1f8 <sh2_sdram_poll+156>: multu   t2,v0
   0x756cc1fc <sh2_sdram_poll+160>: mflo    v0
   0x756cc200 <sh2_sdram_poll+164>: mfhi    v1
   0x756cc204 <sh2_sdram_poll+168>: addu    a1,a1,v1
   0x756cc208 <sh2_sdram_poll+172>: move    v1,a1
   0x756cc20c <sh2_sdram_poll+176>: sll a1,v1,0x16
   0x756cc210 <sh2_sdram_poll+180>: srl t0,v0,0xa
   0x756cc214 <sh2_sdram_poll+184>: or  t0,a1,t0
   0x756cc218 <sh2_sdram_poll+188>: srl t1,v1,0xa
   0x756cc21c <sh2_sdram_poll+192>: move    v0,t0
   0x756cc220 <sh2_sdram_poll+196>: addu    v0,a0,v0
   0x756cc224 <sh2_sdram_poll+200>: sw  v0,24(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cc228 <sh2_sdram_poll+204>: lw  a0,40(sp)
   0x756cc22c <sh2_sdram_poll+208>: lw  a1,44(sp)
   0x756cc230 <sh2_sdram_poll+212>: lw  a2,24(sp)
   0x756cc234 <sh2_sdram_poll+216>: lw  a3,48(sp)
   0x756cc238 <sh2_sdram_poll+220>: lw  v0,-32696(gp)
   0x756cc23c <sh2_sdram_poll+224>: addiu   v0,v0,-2512
   0x756cc240 <sh2_sdram_poll+228>: move    t9,v0
   0x756cc244 <sh2_sdram_poll+232>: bal 0x756c7630 <sh2_poll_write>
   0x756cc248 <sh2_sdram_poll+236>: nop
   0x756cc24c <sh2_sdram_poll+240>: lw  gp,16(sp)
   0x756cc250 <sh2_sdram_poll+244>: lw  v0,48(sp)
   0x756cc254 <sh2_sdram_poll+248>: lw  v0,1380(v0)
   0x756cc258 <sh2_sdram_poll+252>: move    a0,v0
   0x756cc25c <sh2_sdram_poll+256>: li  a1,16
   0x756cc260 <sh2_sdram_poll+260>: lw  a2,24(sp)
   0x756cc264 <sh2_sdram_poll+264>: lw  v0,-30584(gp)
   0x756cc268 <sh2_sdram_poll+268>: move    t9,v0
   0x756cc26c <sh2_sdram_poll+272>: jalr    t9
   0x756cc270 <sh2_sdram_poll+276>: nop
   0x756cc274 <sh2_sdram_poll+280>: lw  gp,16(sp)
   0x756cc278 <sh2_sdram_poll+284>: lw  v0,48(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cc27c <sh2_sdram_poll+288>: lw  v0,1380(v0)
   0x756cc280 <sh2_sdram_poll+292>: lw  v0,1388(v0)
   0x756cc284 <sh2_sdram_poll+296>: lw  v1,24(sp)
   0x756cc288 <sh2_sdram_poll+300>: subu    v0,v1,v0
   0x756cc28c <sh2_sdram_poll+304>: addiu   v0,v0,8
   0x756cc290 <sh2_sdram_poll+308>: blez    v0,0x756cc304 <sh2_sdram_poll+424>
   0x756cc294 <sh2_sdram_poll+312>: nop
   0x756cc298 <sh2_sdram_poll+316>: lw  v0,48(sp)
   0x756cc29c <sh2_sdram_poll+320>: lw  v0,1380(v0)
   0x756cc2a0 <sh2_sdram_poll+324>: lw  v0,164(v0)
   0x756cc2a4 <sh2_sdram_poll+328>: andi    v0,v0,0x1c
   0x756cc2a8 <sh2_sdram_poll+332>: bnez    v0,0x756cc304 <sh2_sdram_poll+424>
   0x756cc2ac <sh2_sdram_poll+336>: nop
   0x756cc2b0 <sh2_sdram_poll+340>: lw  v0,48(sp)
   0x756cc2b4 <sh2_sdram_poll+344>: lw  v0,76(v0)
   0x756cc2b8 <sh2_sdram_poll+348>: sra v0,v0,0xc
   0x756cc2bc <sh2_sdram_poll+352>: addiu   v0,v0,-1
   0x756cc2c0 <sh2_sdram_poll+356>: sw  v0,28(sp)
   0x756cc2c4 <sh2_sdram_poll+360>: lw  v0,28(sp)
   0x756cc2c8 <sh2_sdram_poll+364>: blez    v0,0x756cc304 <sh2_sdram_poll+424>
   0x756cc2cc <sh2_sdram_poll+368>: nop
---Type <return> to continue, or q <return> to quit---
   0x756cc2d0 <sh2_sdram_poll+372>: lw  v0,48(sp)
   0x756cc2d4 <sh2_sdram_poll+376>: lw  v1,1376(v0)
   0x756cc2d8 <sh2_sdram_poll+380>: lw  v0,28(sp)
   0x756cc2dc <sh2_sdram_poll+384>: subu    v1,v1,v0
   0x756cc2e0 <sh2_sdram_poll+388>: lw  v0,48(sp)
   0x756cc2e4 <sh2_sdram_poll+392>: sw  v1,1376(v0)
   0x756cc2e8 <sh2_sdram_poll+396>: lw  v0,48(sp)
   0x756cc2ec <sh2_sdram_poll+400>: lw  v0,76(v0)
   0x756cc2f0 <sh2_sdram_poll+404>: lw  v1,28(sp)
   0x756cc2f4 <sh2_sdram_poll+408>: sll v1,v1,0xc
   0x756cc2f8 <sh2_sdram_poll+412>: subu    v1,v0,v1
   0x756cc2fc <sh2_sdram_poll+416>: lw  v0,48(sp)
   0x756cc300 <sh2_sdram_poll+420>: sw  v1,76(v0)
   0x756cc304 <sh2_sdram_poll+424>: lw  v0,48(sp)
   0x756cc308 <sh2_sdram_poll+428>: lw  v0,164(v0)
   0x756cc30c <sh2_sdram_poll+432>: andi    v0,v0,0x100
   0x756cc310 <sh2_sdram_poll+436>: sltu    v0,zero,v0
   0x756cc314 <sh2_sdram_poll+440>: andi    v0,v0,0xff
   0x756cc318 <sh2_sdram_poll+444>: beqz    v0,0x756cc32c <sh2_sdram_poll+464>
   0x756cc31c <sh2_sdram_poll+448>: nop
   0x756cc320 <sh2_sdram_poll+452>: lw  v0,48(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cc324 <sh2_sdram_poll+456>: lw  v0,76(v0)
   0x756cc328 <sh2_sdram_poll+460>: move    s6,v0
   0x756cc32c <sh2_sdram_poll+464>: lw  ra,36(sp)
   0x756cc330 <sh2_sdram_poll+468>: addiu   sp,sp,40
   0x756cc334 <sh2_sdram_poll+472>: jr  ra
   0x756cc338 <sh2_sdram_poll+476>: nop
   0x756cc33c <sh2_sdram_checks>:   lui gp,0x18
   0x756cc340 <sh2_sdram_checks+4>: addiu   gp,gp,6228
   0x756cc344 <sh2_sdram_checks+8>: addu    gp,gp,t9
   0x756cc348 <sh2_sdram_checks+12>:    addiu   sp,sp,-32
   0x756cc34c <sh2_sdram_checks+16>:    sw  ra,28(sp)
   0x756cc350 <sh2_sdram_checks+20>:    sw  gp,16(sp)
   0x756cc354 <sh2_sdram_checks+24>:    sw  a0,32(sp)
   0x756cc358 <sh2_sdram_checks+28>:    sw  a1,36(sp)
   0x756cc35c <sh2_sdram_checks+32>:    sw  a2,40(sp)
   0x756cc360 <sh2_sdram_checks+36>:    sw  a3,44(sp)
   0x756cc364 <sh2_sdram_checks+40>:    lw  v0,44(sp)
   0x756cc368 <sh2_sdram_checks+44>:    andi    v0,v0,0x80
   0x756cc36c <sh2_sdram_checks+48>:    beqz    v0,0x756cc398 <sh2_sdram_checks+92>
   0x756cc370 <sh2_sdram_checks+52>:    nop
   0x756cc374 <sh2_sdram_checks+56>:    lw  a0,32(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cc378 <sh2_sdram_checks+60>:    lw  a1,36(sp)
   0x756cc37c <sh2_sdram_checks+64>:    lw  a2,40(sp)
   0x756cc380 <sh2_sdram_checks+68>:    lw  v0,-32696(gp)
   0x756cc384 <sh2_sdram_checks+72>:    addiu   v0,v0,16732
   0x756cc388 <sh2_sdram_checks+76>:    move    t9,v0
   0x756cc38c <sh2_sdram_checks+80>:    bal 0x756cc15c <sh2_sdram_poll>
   0x756cc390 <sh2_sdram_checks+84>:    nop
   0x756cc394 <sh2_sdram_checks+88>:    lw  gp,16(sp)
   0x756cc398 <sh2_sdram_checks+92>:    lw  v0,44(sp)
   0x756cc39c <sh2_sdram_checks+96>:    andi    v0,v0,0x7f
   0x756cc3a0 <sh2_sdram_checks+100>:   beqz    v0,0x756cc3c8 <sh2_sdram_checks+140>
   0x756cc3a4 <sh2_sdram_checks+104>:   nop
   0x756cc3a8 <sh2_sdram_checks+108>:   lw  a0,32(sp)
   0x756cc3ac <sh2_sdram_checks+112>:   li  a1,2
   0x756cc3b0 <sh2_sdram_checks+116>:   lw  a2,40(sp)
   0x756cc3b4 <sh2_sdram_checks+120>:   lw  v0,-30552(gp)
   0x756cc3b8 <sh2_sdram_checks+124>:   move    t9,v0
   0x756cc3bc <sh2_sdram_checks+128>:   jalr    t9
   0x756cc3c0 <sh2_sdram_checks+132>:   nop
   0x756cc3c4 <sh2_sdram_checks+136>:   lw  gp,16(sp)
   0x756cc3c8 <sh2_sdram_checks+140>:   lw  ra,28(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cc3cc <sh2_sdram_checks+144>:   addiu   sp,sp,32
   0x756cc3d0 <sh2_sdram_checks+148>:   jr  ra
   0x756cc3d4 <sh2_sdram_checks+152>:   nop
   0x756cc3d8 <sh2_sdram_checks_l>: lui gp,0x18
   0x756cc3dc <sh2_sdram_checks_l+4>:   addiu   gp,gp,6072
   0x756cc3e0 <sh2_sdram_checks_l+8>:   addu    gp,gp,t9
   0x756cc3e4 <sh2_sdram_checks_l+12>:  addiu   sp,sp,-32
   0x756cc3e8 <sh2_sdram_checks_l+16>:  sw  ra,28(sp)
   0x756cc3ec <sh2_sdram_checks_l+20>:  sw  gp,16(sp)
   0x756cc3f0 <sh2_sdram_checks_l+24>:  sw  a0,32(sp)
   0x756cc3f4 <sh2_sdram_checks_l+28>:  sw  a1,36(sp)
   0x756cc3f8 <sh2_sdram_checks_l+32>:  sw  a2,40(sp)
   0x756cc3fc <sh2_sdram_checks_l+36>:  sw  a3,44(sp)
   0x756cc400 <sh2_sdram_checks_l+40>:  lw  v0,44(sp)
   0x756cc404 <sh2_sdram_checks_l+44>:  andi    v0,v0,0x80
   0x756cc408 <sh2_sdram_checks_l+48>:  beqz    v0,0x756cc43c <sh2_sdram_checks_l+100>
   0x756cc40c <sh2_sdram_checks_l+52>:  nop
   0x756cc410 <sh2_sdram_checks_l+56>:  lw  v0,36(sp)
   0x756cc414 <sh2_sdram_checks_l+60>:  srl v0,v0,0x10
   0x756cc418 <sh2_sdram_checks_l+64>:  lw  a0,32(sp)
   0x756cc41c <sh2_sdram_checks_l+68>:  move    a1,v0
---Type <return> to continue, or q <return> to quit---
   0x756cc420 <sh2_sdram_checks_l+72>:  lw  a2,40(sp)
   0x756cc424 <sh2_sdram_checks_l+76>:  lw  v0,-32696(gp)
   0x756cc428 <sh2_sdram_checks_l+80>:  addiu   v0,v0,16732
   0x756cc42c <sh2_sdram_checks_l+84>:  move    t9,v0
   0x756cc430 <sh2_sdram_checks_l+88>:  bal 0x756cc15c <sh2_sdram_poll>
   0x756cc434 <sh2_sdram_checks_l+92>:  nop
   0x756cc438 <sh2_sdram_checks_l+96>:  lw  gp,16(sp)
   0x756cc43c <sh2_sdram_checks_l+100>: lw  v1,44(sp)
   0x756cc440 <sh2_sdram_checks_l+104>: lui v0,0x80
   0x756cc444 <sh2_sdram_checks_l+108>: and v0,v1,v0
   0x756cc448 <sh2_sdram_checks_l+112>: beqz    v0,0x756cc47c <sh2_sdram_checks_l+164>
   0x756cc44c <sh2_sdram_checks_l+116>: nop
   0x756cc450 <sh2_sdram_checks_l+120>: lw  v0,32(sp)
   0x756cc454 <sh2_sdram_checks_l+124>: addiu   v0,v0,2
   0x756cc458 <sh2_sdram_checks_l+128>: move    a0,v0
   0x756cc45c <sh2_sdram_checks_l+132>: lw  a1,36(sp)
   0x756cc460 <sh2_sdram_checks_l+136>: lw  a2,40(sp)
   0x756cc464 <sh2_sdram_checks_l+140>: lw  v0,-32696(gp)
   0x756cc468 <sh2_sdram_checks_l+144>: addiu   v0,v0,16732
   0x756cc46c <sh2_sdram_checks_l+148>: move    t9,v0
   0x756cc470 <sh2_sdram_checks_l+152>: bal 0x756cc15c <sh2_sdram_poll>
---Type <return> to continue, or q <return> to quit---
   0x756cc474 <sh2_sdram_checks_l+156>: nop
   0x756cc478 <sh2_sdram_checks_l+160>: lw  gp,16(sp)
   0x756cc47c <sh2_sdram_checks_l+164>: lw  v1,44(sp)
   0x756cc480 <sh2_sdram_checks_l+168>: lui v0,0xff7f
   0x756cc484 <sh2_sdram_checks_l+172>: ori v0,v0,0xff7f
   0x756cc488 <sh2_sdram_checks_l+176>: and v0,v1,v0
   0x756cc48c <sh2_sdram_checks_l+180>: beqz    v0,0x756cc4b4 <sh2_sdram_checks_l+220>
   0x756cc490 <sh2_sdram_checks_l+184>: nop
   0x756cc494 <sh2_sdram_checks_l+188>: lw  a0,32(sp)
   0x756cc498 <sh2_sdram_checks_l+192>: li  a1,4
   0x756cc49c <sh2_sdram_checks_l+196>: lw  a2,40(sp)
   0x756cc4a0 <sh2_sdram_checks_l+200>: lw  v0,-30552(gp)
   0x756cc4a4 <sh2_sdram_checks_l+204>: move    t9,v0
   0x756cc4a8 <sh2_sdram_checks_l+208>: jalr    t9
   0x756cc4ac <sh2_sdram_checks_l+212>: nop
   0x756cc4b0 <sh2_sdram_checks_l+216>: lw  gp,16(sp)
   0x756cc4b4 <sh2_sdram_checks_l+220>: lw  ra,28(sp)
   0x756cc4b8 <sh2_sdram_checks_l+224>: addiu   sp,sp,32
   0x756cc4bc <sh2_sdram_checks_l+228>: jr  ra
   0x756cc4c0 <sh2_sdram_checks_l+232>: nop
   0x756cc4c4 <sh2_da_checks>:  lui gp,0x18
---Type <return> to continue, or q <return> to quit---
   0x756cc4c8 <sh2_da_checks+4>:    addiu   gp,gp,5836
   0x756cc4cc <sh2_da_checks+8>:    addu    gp,gp,t9
   0x756cc4d0 <sh2_da_checks+12>:   addiu   sp,sp,-32
   0x756cc4d4 <sh2_da_checks+16>:   sw  ra,28(sp)
   0x756cc4d8 <sh2_da_checks+20>:   sw  gp,16(sp)
   0x756cc4dc <sh2_da_checks+24>:   sw  a0,32(sp)
   0x756cc4e0 <sh2_da_checks+28>:   sw  a1,36(sp)
   0x756cc4e4 <sh2_da_checks+32>:   sw  a2,40(sp)
   0x756cc4e8 <sh2_da_checks+36>:   lw  a0,32(sp)
   0x756cc4ec <sh2_da_checks+40>:   li  a1,2
   0x756cc4f0 <sh2_da_checks+44>:   lw  a2,40(sp)
   0x756cc4f4 <sh2_da_checks+48>:   lw  v0,-30692(gp)
   0x756cc4f8 <sh2_da_checks+52>:   move    t9,v0
   0x756cc4fc <sh2_da_checks+56>:   jalr    t9
   0x756cc500 <sh2_da_checks+60>:   nop
   0x756cc504 <sh2_da_checks+64>:   lw  gp,16(sp)
   0x756cc508 <sh2_da_checks+68>:   lw  ra,28(sp)
   0x756cc50c <sh2_da_checks+72>:   addiu   sp,sp,32
   0x756cc510 <sh2_da_checks+76>:   jr  ra
   0x756cc514 <sh2_da_checks+80>:   nop
   0x756cc518 <sh2_da_checks_l>:    lui gp,0x18
---Type <return> to continue, or q <return> to quit---
   0x756cc51c <sh2_da_checks_l+4>:  addiu   gp,gp,5752
   0x756cc520 <sh2_da_checks_l+8>:  addu    gp,gp,t9
   0x756cc524 <sh2_da_checks_l+12>: addiu   sp,sp,-32
   0x756cc528 <sh2_da_checks_l+16>: sw  ra,28(sp)
   0x756cc52c <sh2_da_checks_l+20>: sw  gp,16(sp)
   0x756cc530 <sh2_da_checks_l+24>: sw  a0,32(sp)
   0x756cc534 <sh2_da_checks_l+28>: sw  a1,36(sp)
   0x756cc538 <sh2_da_checks_l+32>: sw  a2,40(sp)
   0x756cc53c <sh2_da_checks_l+36>: lw  a0,32(sp)
   0x756cc540 <sh2_da_checks_l+40>: li  a1,4
   0x756cc544 <sh2_da_checks_l+44>: lw  a2,40(sp)
   0x756cc548 <sh2_da_checks_l+48>: lw  v0,-30692(gp)
   0x756cc54c <sh2_da_checks_l+52>: move    t9,v0
   0x756cc550 <sh2_da_checks_l+56>: jalr    t9
   0x756cc554 <sh2_da_checks_l+60>: nop
   0x756cc558 <sh2_da_checks_l+64>: lw  gp,16(sp)
   0x756cc55c <sh2_da_checks_l+68>: lw  ra,28(sp)
   0x756cc560 <sh2_da_checks_l+72>: addiu   sp,sp,32
   0x756cc564 <sh2_da_checks_l+76>: jr  ra
   0x756cc568 <sh2_da_checks_l+80>: nop
   0x756cc56c <sh2_write_ignore>:   sw  a0,0(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cc570 <sh2_write_ignore+4>: sw  a1,4(sp)
   0x756cc574 <sh2_write_ignore+8>: sw  a2,8(sp)
   0x756cc578 <sh2_write_ignore+12>:    jr  ra
   0x756cc57c <sh2_write_ignore+16>:    nop
   0x756cc580 <sh2_write8_unmapped>:    sw  a0,0(sp)
   0x756cc584 <sh2_write8_unmapped+4>:  sw  a1,4(sp)
   0x756cc588 <sh2_write8_unmapped+8>:  sw  a2,8(sp)
   0x756cc58c <sh2_write8_unmapped+12>: jr  ra
   0x756cc590 <sh2_write8_unmapped+16>: nop
   0x756cc594 <sh2_write8_cs0>: lui gp,0x18
   0x756cc598 <sh2_write8_cs0+4>:   addiu   gp,gp,5628
   0x756cc59c <sh2_write8_cs0+8>:   addu    gp,gp,t9
   0x756cc5a0 <sh2_write8_cs0+12>:  addiu   sp,sp,-32
   0x756cc5a4 <sh2_write8_cs0+16>:  sw  ra,28(sp)
   0x756cc5a8 <sh2_write8_cs0+20>:  sw  gp,16(sp)
   0x756cc5ac <sh2_write8_cs0+24>:  sw  a0,32(sp)
   0x756cc5b0 <sh2_write8_cs0+28>:  sw  a1,36(sp)
   0x756cc5b4 <sh2_write8_cs0+32>:  sw  a2,40(sp)
   0x756cc5b8 <sh2_write8_cs0+36>:  lw  v0,40(sp)
   0x756cc5bc <sh2_write8_cs0+40>:  lw  v0,164(v0)
   0x756cc5c0 <sh2_write8_cs0+44>:  andi    v0,v0,0x100
---Type <return> to continue, or q <return> to quit---
   0x756cc5c4 <sh2_write8_cs0+48>:  sltu    v0,zero,v0
   0x756cc5c8 <sh2_write8_cs0+52>:  andi    v0,v0,0xff
   0x756cc5cc <sh2_write8_cs0+56>:  beqz    v0,0x756cc5e4 <sh2_write8_cs0+80>
   0x756cc5d0 <sh2_write8_cs0+60>:  nop
   0x756cc5d4 <sh2_write8_cs0+64>:  move    v0,s6
   0x756cc5d8 <sh2_write8_cs0+68>:  move    v1,v0
   0x756cc5dc <sh2_write8_cs0+72>:  lw  v0,40(sp)
   0x756cc5e0 <sh2_write8_cs0+76>:  sw  v1,76(v0)
   0x756cc5e4 <sh2_write8_cs0+80>:  lw  v1,32(sp)
   0x756cc5e8 <sh2_write8_cs0+84>:  lui v0,0x3
   0x756cc5ec <sh2_write8_cs0+88>:  ori v0,v0,0xffc0
   0x756cc5f0 <sh2_write8_cs0+92>:  and v1,v1,v0
   0x756cc5f4 <sh2_write8_cs0+96>:  li  v0,16384
   0x756cc5f8 <sh2_write8_cs0+100>: bne v1,v0,0x756cc62c <sh2_write8_cs0+152>
   0x756cc5fc <sh2_write8_cs0+104>: nop
   0x756cc600 <sh2_write8_cs0+108>: lw  a0,32(sp)
   0x756cc604 <sh2_write8_cs0+112>: lw  a1,36(sp)
   0x756cc608 <sh2_write8_cs0+116>: lw  a2,40(sp)
   0x756cc60c <sh2_write8_cs0+120>: lw  v0,-32696(gp)
   0x756cc610 <sh2_write8_cs0+124>: addiu   v0,v0,5508
   0x756cc614 <sh2_write8_cs0+128>: move    t9,v0
---Type <return> to continue, or q <return> to quit---
   0x756cc618 <sh2_write8_cs0+132>: bal 0x756c9584 <p32x_sh2reg_write8>
   0x756cc61c <sh2_write8_cs0+136>: nop
   0x756cc620 <sh2_write8_cs0+140>: lw  gp,16(sp)
   0x756cc624 <sh2_write8_cs0+144>: b   0x756cc71c <sh2_write8_cs0+392>
   0x756cc628 <sh2_write8_cs0+148>: nop
   0x756cc62c <sh2_write8_cs0+152>: lw  v0,-30884(gp)
   0x756cc630 <sh2_write8_cs0+156>: lhu v0,0(v0)
   0x756cc634 <sh2_write8_cs0+160>: sll v0,v0,0x10
   0x756cc638 <sh2_write8_cs0+164>: sra v0,v0,0x10
   0x756cc63c <sh2_write8_cs0+168>: bgez    v0,0x756cc6f8 <sh2_write8_cs0+356>
   0x756cc640 <sh2_write8_cs0+172>: nop
   0x756cc644 <sh2_write8_cs0+176>: lw  v1,32(sp)
   0x756cc648 <sh2_write8_cs0+180>: lui v0,0x3
   0x756cc64c <sh2_write8_cs0+184>: ori v0,v0,0xfff0
   0x756cc650 <sh2_write8_cs0+188>: and v1,v1,v0
   0x756cc654 <sh2_write8_cs0+192>: li  v0,16640
   0x756cc658 <sh2_write8_cs0+196>: bne v1,v0,0x756cc690 <sh2_write8_cs0+252>
   0x756cc65c <sh2_write8_cs0+200>: nop
   0x756cc660 <sh2_write8_cs0+204>: lw  v0,40(sp)
   0x756cc664 <sh2_write8_cs0+208>: sw  zero,176(v0)
   0x756cc668 <sh2_write8_cs0+212>: lw  a0,32(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cc66c <sh2_write8_cs0+216>: lw  a1,36(sp)
   0x756cc670 <sh2_write8_cs0+220>: lw  v0,-32696(gp)
   0x756cc674 <sh2_write8_cs0+224>: addiu   v0,v0,3356
   0x756cc678 <sh2_write8_cs0+228>: move    t9,v0
   0x756cc67c <sh2_write8_cs0+232>: bal 0x756c8d1c <p32x_vdp_write8>
   0x756cc680 <sh2_write8_cs0+236>: nop
   0x756cc684 <sh2_write8_cs0+240>: lw  gp,16(sp)
   0x756cc688 <sh2_write8_cs0+244>: b   0x756cc71c <sh2_write8_cs0+392>
   0x756cc68c <sh2_write8_cs0+248>: nop
   0x756cc690 <sh2_write8_cs0+252>: lw  v1,32(sp)
   0x756cc694 <sh2_write8_cs0+256>: lui v0,0x3
   0x756cc698 <sh2_write8_cs0+260>: ori v0,v0,0xfe00
   0x756cc69c <sh2_write8_cs0+264>: and v1,v1,v0
   0x756cc6a0 <sh2_write8_cs0+268>: li  v0,16896
   0x756cc6a4 <sh2_write8_cs0+272>: bne v1,v0,0x756cc6f8 <sh2_write8_cs0+356>
   0x756cc6a8 <sh2_write8_cs0+276>: nop
   0x756cc6ac <sh2_write8_cs0+280>: lw  v0,40(sp)
   0x756cc6b0 <sh2_write8_cs0+284>: sw  zero,176(v0)
   0x756cc6b4 <sh2_write8_cs0+288>: lw  v0,-32228(gp)
   0x756cc6b8 <sh2_write8_cs0+292>: lw  v1,0(v0)
   0x756cc6bc <sh2_write8_cs0+296>: lui v0,0xd
---Type <return> to continue, or q <return> to quit---
   0x756cc6c0 <sh2_write8_cs0+300>: ori v0,v0,0x2c00
   0x756cc6c4 <sh2_write8_cs0+304>: addu    v1,v1,v0
   0x756cc6c8 <sh2_write8_cs0+308>: lw  v0,32(sp)
   0x756cc6cc <sh2_write8_cs0+312>: andi    v0,v0,0x1ff
   0x756cc6d0 <sh2_write8_cs0+316>: xori    v0,v0,0x1
   0x756cc6d4 <sh2_write8_cs0+320>: addu    v0,v1,v0
   0x756cc6d8 <sh2_write8_cs0+324>: lw  v1,36(sp)
   0x756cc6dc <sh2_write8_cs0+328>: andi    v1,v1,0xff
   0x756cc6e0 <sh2_write8_cs0+332>: sb  v1,0(v0)
   0x756cc6e4 <sh2_write8_cs0+336>: lw  v0,-30884(gp)
   0x756cc6e8 <sh2_write8_cs0+340>: li  v1,1
   0x756cc6ec <sh2_write8_cs0+344>: sb  v1,103(v0)
   0x756cc6f0 <sh2_write8_cs0+348>: b   0x756cc71c <sh2_write8_cs0+392>
   0x756cc6f4 <sh2_write8_cs0+352>: nop
   0x756cc6f8 <sh2_write8_cs0+356>: lw  a0,32(sp)
   0x756cc6fc <sh2_write8_cs0+360>: lw  a1,36(sp)
   0x756cc700 <sh2_write8_cs0+364>: lw  a2,40(sp)
   0x756cc704 <sh2_write8_cs0+368>: lw  v0,-32696(gp)
   0x756cc708 <sh2_write8_cs0+372>: addiu   v0,v0,17792
   0x756cc70c <sh2_write8_cs0+376>: move    t9,v0
   0x756cc710 <sh2_write8_cs0+380>: bal 0x756cc580 <sh2_write8_unmapped>
---Type <return> to continue, or q <return> to quit---
   0x756cc714 <sh2_write8_cs0+384>: nop
   0x756cc718 <sh2_write8_cs0+388>: lw  gp,16(sp)
   0x756cc71c <sh2_write8_cs0+392>: lw  v0,40(sp)
   0x756cc720 <sh2_write8_cs0+396>: lw  v0,164(v0)
   0x756cc724 <sh2_write8_cs0+400>: andi    v0,v0,0x100
   0x756cc728 <sh2_write8_cs0+404>: sltu    v0,zero,v0
   0x756cc72c <sh2_write8_cs0+408>: andi    v0,v0,0xff
   0x756cc730 <sh2_write8_cs0+412>: beqz    v0,0x756cc744 <sh2_write8_cs0+432>
   0x756cc734 <sh2_write8_cs0+416>: nop
   0x756cc738 <sh2_write8_cs0+420>: lw  v0,40(sp)
   0x756cc73c <sh2_write8_cs0+424>: lw  v0,76(v0)
   0x756cc740 <sh2_write8_cs0+428>: move    s6,v0
   0x756cc744 <sh2_write8_cs0+432>: lw  ra,28(sp)
   0x756cc748 <sh2_write8_cs0+436>: addiu   sp,sp,32
   0x756cc74c <sh2_write8_cs0+440>: jr  ra
   0x756cc750 <sh2_write8_cs0+444>: nop
   0x756cc754 <sh2_write8_dram>:    addiu   sp,sp,-16
   0x756cc758 <sh2_write8_dram+4>:  sw  a0,16(sp)
   0x756cc75c <sh2_write8_dram+8>:  sw  a1,20(sp)
   0x756cc760 <sh2_write8_dram+12>: sw  a2,24(sp)
   0x756cc764 <sh2_write8_dram+16>: lw  v0,20(sp)
---Type <return> to continue, or q <return> to quit---
   0x756cc768 <sh2_write8_dram+20>: andi    v0,v0,0xff
   0x756cc76c <sh2_write8_dram+24>: beqz    v0,0x756cc7a8 <sh2_write8_dram+84>
   0x756cc770 <sh2_write8_dram+28>: nop
   0x756cc774 <sh2_write8_dram+32>: lw  v0,24(sp)
   0x756cc778 <sh2_write8_dram+36>: lw  v0,144(v0)
   0x756cc77c <sh2_write8_dram+40>: sw  v0,8(sp)
   0x756cc780 <sh2_write8_dram+44>: lw  v1,16(sp)
   0x756cc784 <sh2_write8_dram+48>: lui v0,0x1
   0x756cc788 <sh2_write8_dram+52>: ori v0,v0,0xffff
   0x756cc78c <sh2_write8_dram+56>: and v0,v1,v0
   0x756cc790 <sh2_write8_dram+60>: xori    v0,v0,0x1
   0x756cc794 <sh2_write8_dram+64>: lw  v1,8(sp)
   0x756cc798 <sh2_write8_dram+68>: addu    v0,v1,v0
   0x756cc79c <sh2_write8_dram+72>: lw  v1,20(sp)
   0x756cc7a0 <sh2_write8_dram+76>: andi    v1,v1,0xff
   0x756cc7a4 <sh2_write8_dram+80>: sb  v1,0(v0)
   0x756cc7a8 <sh2_write8_dram+84>: addiu   sp,sp,16
   0x756cc7ac <sh2_write8_dram+88>: jr  ra
   0x756cc7b0 <sh2_write8_dram+92>: nop
   0x756cc7b4 <sh2_write8_sdram>:   lui gp,0x18
   0x756cc7b8 <sh2_write8_sdram+4>: addiu   gp,gp,5084
---Type <return> to continue, or q <return> to quit---
   0x756cc7bc <sh2_write8_sdram+8>: addu    gp,gp,t9
   0x756cc7c0 <sh2_write8_sdram+12>:    addiu   sp,sp,-48
   0x756cc7c4 <sh2_write8_sdram+16>:    sw  ra,44(sp)
   0x756cc7c8 <sh2_write8_sdram+20>:    sw  gp,16(sp)
   0x756cc7cc <sh2_write8_sdram+24>:    sw  a0,48(sp)
   0x756cc7d0 <sh2_write8_sdram+28>:    sw  a1,52(sp)
   0x756cc7d4 <sh2_write8_sdram+32>:    sw  a2,56(sp)
   0x756cc7d8 <sh2_write8_sdram+36>:    lw  v1,48(sp)
   0x756cc7dc <sh2_write8_sdram+40>:    lui v0,0x3
   0x756cc7e0 <sh2_write8_sdram+44>:    ori v0,v0,0xffff
   0x756cc7e4 <sh2_write8_sdram+48>:    and v0,v1,v0
   0x756cc7e8 <sh2_write8_sdram+52>:    xori    v0,v0,0x1
   0x756cc7ec <sh2_write8_sdram+56>:    sw  v0,24(sp)
   0x756cc7f0 <sh2_write8_sdram+60>:    lw  v0,56(sp)
   0x756cc7f4 <sh2_write8_sdram+64>:    lw  v1,136(v0)
   0x756cc7f8 <sh2_write8_sdram+68>:    lw  v0,24(sp)
   0x756cc7fc <sh2_write8_sdram+72>:    addu    v0,v1,v0
   0x756cc800 <sh2_write8_sdram+76>:    lw  v1,52(sp)
(gdb) info reg
          zero       at       v0       v1       a0       a1       a2       a3
 R0   00000000 00000000 00000001 00000200 00000220 759431a0 756cc030 00000000 
            t0       t1       t2       t3       t4       t5       t6       t7
 R8   0000000a 00000030 7fb2e283 00000807 7fb2e270 00000025 00000002 756cc030 
            s0       s1       s2       s3       s4       s5       s6       s7
 R16  7fb35dc7 00411b8c 7fb35140 77586e20 00000000 00000000 004f20f0 759431a0 
            t8       t9       k0       k1       gp       sp       s8       ra
 R24  00000001 00003d00 75d5d114 00000000 00185b90 7fb2eff8 00000000 756cc06c 
        status       lo       hi badvaddr    cause       pc
      00000c13 00000000 00000007 0017ddac 00800008 756cbef8 
          fcsr      fir  restart
      20000004 00330000 00000000 
(gdb)

Sorry, an oversight. This additional patch should do the trick:


diff --git a/cpu/drc/emit_mips.c b/cpu/drc/emit_mips.c
--- a/cpu/drc/emit_mips.c
+++ b/cpu/drc/emit_mips.c
@@ -1504,8 +1505,10 @@ static int emith_cond_check(int cond, int *r)
 } while (0)
 #define emith_jump_at_size() 8

-#define emith_jump_reg(r) \
-       emith_branch(MIPS_JR(r))
+#define emith_jump_reg(r) do { \
+       if ((r) != CR) emith_move_r_r(CR, r); \
+       emith_branch(MIPS_JR(r)); \
+} while (0)
 #define emith_jump_reg_c(cond, r) \
        emith_jump_reg(r)

This issue is an effect of PIC code. I never had this with my opendingux standalone builds. Interestingly enough I haven't seen these problems on x86/arm/arm64 PIC builds, maybe due to those having PC-relative addressing modes mips has not. I'll have a closer look at all supported DRC platforms to make sure this isn't happening elsewhere.

Besides, the patches need some more scrutiny, since this t9 business is only needed for ABI calls, but not for drc-internal calls. There's possibly a small potential to micro-optimize this.

BTW, for further gdb assembly dumps please use: x/44i $pc-88 that shows only the code around the crash, which is probably more helpful.

Just to muddle my elation a bit: that most probably doesn't explain this "host register locked" business on the 3ds. I'm still trying to reproduce that somehow. I don't have a 3ds, hence I can't do any real debugging, and it's happening neither on qemu-arm nor on caanoo, -fpic or not.

@irixxxx Thank you so very much! The latest patch fixes everything - 32x games now run without issue. You've made an old man very happy. Bless you for working on this.

Performance is a little choppy on the RG350 (~45-47 FPS for 3D games and Kolibri), but I will add an automatic frameskip option to the core which should make things quite acceptable :)

This issue is an effect of PIC code. I never had this with my opendingux standalone builds. Interestingly enough I haven't seen these problems on x86/arm/arm64 PIC builds, maybe due to those having PC-relative addressing modes mips has not. I'll have a closer look at all supported DRC platforms to make sure this isn't happening elsewhere.

Ah, I see! Yes, the fact that we compile cores as shared objects seems to create a number of issues/problems on MIPS (for example, our gpSP core has no dynarec on OpenDingux - we do have a MIPS dynarec written in assembly, but it only works with static builds...).

Besides, the patches need some more scrutiny, since this t9 business is only needed for ABI calls, but not for drc-internal calls. There's possibly a small potential to micro-optimize this.

Certainly, and thank you for your continued interest!

How should we go about getting these fixes into the core, once you're happy with them? Would you prefer to wait until we've resolved the repo issues? It might be easier for you if we avoid muddying the waters with interim commits until we've decided on the correct approach there (I do like hizzlekizzle's suggestion of switching over fully to your fork, but whatever you think is best).

Just to muddle my elation a bit: that most probably doesn't explain this "host register locked" business on the 3ds. I'm still trying to reproduce that somehow. I don't have a 3ds, hence I can't do any real debugging, and it's happening neither on qemu-arm nor on caanoo, -fpic or not.

In theory, it's supposed to be possible to debug 3DS software using Citra, but I'm sure how that works out in practice...

It's possible to use gdb on a real 3DS: https://gist.github.com/LiquidFenrir/d110f3e7755ffbe82672eda49ae21af2 - would that be useful? Maybe @justinweiss could help with that...?

just a quick note to whom it may concern: https://techpubs.jurassic.nl/manuals/0630/developer/Cplr_PTG/sgi_html/apa.html it should probably be possible to fix gpSP with this.

Just for info, I've added frame skipping to the core (https://github.com/libretro/picodrive/pull/138) and it makes 32x content far more playable on the RG350.

One thing I've noticed is that the RetroArch core is significantly slower than standalone, at least on the RG350 - e.g. Star Wars Arcade, Kolibri and The Amazing Spider-Man are a slideshow in RetroArch, but are very smooth in standalone. I have no explanation for this, but most games run fine - so even if we can't reach parity, I think the core remains worthwhile for 32x content :)

just a quick note to whom it may concern: https://techpubs.jurassic.nl/manuals/0630/developer/Cplr_PTG/sgi_html/apa.html it should probably be possible to fix gpSP with this.

Thank you very much for this! I don't think we have any devs at the moment who know assembly and who would be willing to work on this, but if we find someone that document will be invaluable!

Yes, there's a gdb stub built into the custom firmware for 3DS, so it's possible to remote debug. I have a good setup for that, happy to help with lookups or anything else that would be useful.

OK, @justinweiss we continue this on your issue ikn my repo. I've posted you there already.

Meanwhile, I've had a look at ABI descriptions and compiler outputs with and without -fpic for armv7, armv8, x86_64, mips32, ppc64le and risc-v64. I sincerely believe those are all ok as of now. i386 seems to be unaffected as well - can't find any useful ABI doc, but the generated code looks inconspicuous. Can't test mips64 (not examined) and riscv-32 (no compiler).

Thank you for the confirmation. I really appreciate your dedication in following up on this. Picodrive is in safe hands with you at the helm.

libretro / picodrive

[3DS] 32x crashes with dynarec on #135