linux4sam / at91bootstrap

Second level bootloader for Microchip SoC (aka AT91)
http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
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SAMA5D27 SOM with eMMC, Bootloader gives SDHC: Error detected in status: 0x8020, 0x40 #172

Open philchu128 opened 11 months ago

philchu128 commented 11 months ago

I have a custom design that is based on the SAMA5D27 SOM1 EK (eval board). Key difference is that my design has a solder-in Sandisk 8 GB eMMC on SDMMC0 bus. Sandisk eMMC is SDINBDG4-8G-XI2. I have 2 boards of this custom design and both exhibit the same error when AT91bootstrap is booted from eMMC. It displays "SDHC: Error detected in status: 0x8020, 0x40" and it does not use 8 bit bus. I did enable the SDHC0 8 bit bus support in menuconfig. I read about the eMMC GPIO drive strength and changed code to buildroot-at91/output/build/atbootstrap3-v4.0.5/device/sam5d2/sama5d2.c Function at91_sdhc_hw_init(), to make the drive strength high. Recompiled boot.bin and programmed it to eMMC, but this does not help the problem. Does anyone know what the solution is to eliminate the error and to run the eMMC in bit? Thanks Phil

void at91_sdhc_hw_init(void) {

ifdef CONFIG_BOARD_QUIRK_SAMA5D2_SIP

       unsigned int reg;

endif

ifdef CONFIG_SDHC0

       const struct pio_desc sdmmc_pins[] = {

// {"SDMMC0_CK", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A}, // {"SDMMC0_CMD", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A}, // {"SDMMC0_DAT0", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A}, // {"SDMMC0_DAT1", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A}, // {"SDMMC0_DAT2", AT91C_PIN_PA(4), 0, PIO_DEFAULT, PIO_PERIPH_A}, // {"SDMMC0_DAT3", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"SDMMC0_CK", AT91C_PIN_PA(0), 0, PIO_DRVSTR_HI, PIO_PERIPH_A}, {"SDMMC0_CMD", AT91C_PIN_PA(1), 0, PIO_DRVSTR_HI, PIO_PERIPH_A}, {"SDMMC0_DAT0", AT91C_PIN_PA(2), 0, PIO_DRVSTR_HI, PIO_PERIPH_A}, {"SDMMC0_DAT1", AT91C_PIN_PA(3), 0, PIO_DRVSTR_HI, PIO_PERIPH_A}, {"SDMMC0_DAT2", AT91C_PIN_PA(4), 0, PIO_DRVSTR_HI, PIO_PERIPH_A}, {"SDMMC0_DAT3", AT91C_PIN_PA(5), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},

ifdef CONFIG_SDHC_8BIT_SUPPORT

// {"SDMMC0_DAT4", AT91C_PIN_PA(6), 0, PIO_DEFAULT, PIO_PERIPH_A}, // {"SDMMC0_DAT5", AT91C_PIN_PA(7), 0, PIO_DEFAULT, PIO_PERIPH_A}, // {"SDMMC0_DAT6", AT91C_PIN_PA(8), 0, PIO_DEFAULT, PIO_PERIPH_A}, // {"SDMMC0_DAT7", AT91C_PIN_PA(9), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"SDMMC0_DAT4", AT91C_PIN_PA(6), 0, PIO_DRVSTR_HI, PIO_PERIPH_A}, {"SDMMC0_DAT5", AT91C_PIN_PA(7), 0, PIO_DRVSTR_HI, PIO_PERIPH_A}, {"SDMMC0_DAT6", AT91C_PIN_PA(8), 0, PIO_DRVSTR_HI, PIO_PERIPH_A}, {"SDMMC0_DAT7", AT91C_PIN_PA(9), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},

endif

                   {"SDMMC0_RSTN", AT91C_PIN_PA(10), 0, PIO_DEFAULT, PIO_PERIPH_A},
                   {"SDMMC0_VDDSEL", AT91C_PIN_PA(11), 0, PIO_DEFAULT, PIO_PERIPH_A},

ifndef CONFIG_BOARD_QUIRK_SAMA5D2_XULT

                   {"SDMMC0_WP",  AT91C_PIN_PA(12), 1, PIO_DEFAULT, PIO_PERIPH_A},

endif

                   {"SDMMC0_CD",  AT91C_PIN_PA(13), 0, PIO_DEFAULT, PIO_PERIPH_A},
                   {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
       };

endif

Below is the boot log

RomBOOT ba_offset = 0xb ... Dump DDRAMC Registers: @address: 0x0 0x4 0x8 0xc 0xf000c000: 0x10 0x3004ff 0xd00039 0x22239337 0xf000c010: 0x2c81716 0x82482 0x33338 0x10000 0xf000c020: 0x16 0x50008 0x0 0x0 0xf000c030: 0x6 0xf6504 0x0 0x0 0xf000c040: 0x0 0x0 0x0 0x0 0xf000c050: 0x0 0x0 0x0 0x1 0xf000c060: 0x0 0x0 0x0 0x0 0xf000c070: 0x0 0x0 0x0 0x0 0xf000c080: 0x0 0x0 0x0 0x0 0xf000c090: 0x0 0x0 0x0 0x0 0xf000c0a0: 0x0 0x0 0x0 0x0 0xf000c0b0: 0x0 0x0 0x1 0x0 0xf000c0c0: 0x0 0x0 0x0 0x0 0xf000c0d0: 0x0 0x0 0x0 0x0 0xf000c0e0: 0x0 0x0 0x0 0x4000 0xf000c0f0: 0x484d5044 0x44524320 0x0 0x20301 0xf000c100: 0x0 0x0 0x4040404 0x3030303 0xf000c110: 0x0 0x1 0x4404402 0x0 0xf000c120: 0x0 0x0 0xd00 0xd00 0xf000c130: 0xd00 0xd00 0xe00 0xe00 0xf000c140: 0xe00 0xe00 0x11 0x11 0xf000c150: 0x11 0x11 0x10 0x0 Applying VDDSDMMC errata to ID: 0x33

AT91Bootstrap 4.0.5 (2023-09-14 10:39:44) All interrupts redirected to AIC SDHC: fix in place for SAMA5D2 SiP VDDSDMMC over-consumption errata SD/MMC: Image: Read file u-boot.bin to 0x23f00000 MMC: ADMA supported mmc_verify_operating_condition mmc_verify_operating_condition success OCR = 0xc0ff8080 Card type is MMC sd card identified with CID = 0x45010044 0x47343030 0x38017fce 0xd2799ff sdcard_identification success MMC: Specification Version 4.0 or higher MMC: v5.1 detected MMC: highspeed supported MMC: Dual Data Rate supported MMC: detecting buswidth... SDHC: Error detected in status: 0x8020, 0x40 MMC: 4-bit bus width detected SD/MMC: Done to load image

U-Boot 2022.01-linux4sam-2022.10 (Sep 14 2023 - 21:14:10 -0400) CPU: SAMA5D27 1G bits DDR2 SDRAM Crystal frequency: 24 MHz CPU clock : 492 MHz Master clock : 164 MHz DRAM: 128 MiB MMC: sdio-host@a0000000: 0, sdio-host@b0000000: 1 Loading Environment from FAT... OK In: serial@f8020000 Out: serial@f8020000 Err: serial@f8020000 <<Ç8<xØ<<<<<<¸Net: eth0: ethernet@f8008000 Hit any key to stop autoboot: 0 5238716 bytes read in 331 ms (15.1 MiB/s)

Loading kernel from FIT Image at 21000000 ...

TonyHan11 commented 11 months ago

Hi Phil, I can reproduce the issue on sama5d27-som1-ek board using at91bootstrap v4.0.5 with the defconfig not changed (# CONFIG_SDHC_8BIT_SUPPORT is not set). After CONFIG_SDHC_8BIT_SUPPORT=y is added to sama5d27_som1_eksd_uboot_defconfig (GPIO drive strength not changed), 8-bit bus width can be detected correctly. Following is the log:

RomBOOT

AT91Bootstrap 4.0.5-dirty (2023-09-20 13:47:01)

SDHC: fix in place for SAMA5D2 SiP VDDSDMMC over-consumption errata
SD/MMC: Image: Read file u-boot.bin to 0x23f00000
MMC: ADMA supported
MMC: Specification Version 4.0 or higher
MMC: v5.0/5.01 detected
MMC: highspeed supported
MMC: Dual Data Rate supported
MMC: detecting buswidth...
MMC: 8-bit bus width detected
*** FATFS: f_open, filename: [u-boot.bin]: error
SD/MMC: Failed to load image