Open Hacksawfred3232 opened 1 year ago
Referencing: StarLabsLtd/firmware#104 I would like to see if Heads can be ported to the Starbook MkVI. Starlabs Coreboot firmware is located here: https://github.com/StarLabsLtd/coreboot
Already had a look over the documentation and parts of the code for Heads. Build system differences aside, Coreboot version of Heads (the latest one at least) is 4.19 while Starbook's laptops are on 8.40+ at time of writing. Is there anything stopping the version being upgraded to 8.40+?
@Hacksawfred3232:
Clicking on the link provided showed a branch of coreboot 4.19. I have not followed current upstream coreboot support of that specific board. But rule of thumb is if it is supported upstream in coreboot, then the beginning of a port is to have a known working coreboot configuration file, list all drivers needed in which version of linux kernel and have them activated in a corresponding linux config. Duplicate the closest board configuration file, have it point to the referred coreboot and linux config, cross finger and build. If it builds, then be prepared with an extrnal reprogrammer, and flash it externally after having taken a backup to properly unbrick in case its not magically working the first time.
I've noted that there are some references to a 32bit compiler, despite most modern systems being 64bit. Why is this the case?
coreboot builds its own build stack per coreboot release. There is experimental 64 bit support, but coreboot builds in 32 bits. Firmware is different here then building a kernel or an app.
I also saw that on the wiki, the maximized ROM version requires all regions to be unlocked. Why is this required? Maximized here means that those roms distribute everything that is to be flashed internally or externally. To gain near 12mb of SPI space, ME needed to be neutered, gaining 5MB of the 12mb on ivy bridge. Ivy bridge is the last known chipset for which ME can be neutered (which means, per me_cleaner docs, that most of the modules are removed) as opposed to HAP bit deactivation or other tricks that can be applied to deactivate ME, but that doesn't give back the space occupied in the chip.
What it means for newer boards is mostly all explained under #692 on top post. Newer architectures require more blobs, and one will have to either find a way to find them online in updates provided in blob format by constructor (this is what was done for ivy and sandy bridge, haswell for t440p and other ports that are currently happening)
The other solution would be to recreate what are "legacy" boards. That would mean creating a full size bios image, but having flashing only write over the BIOS partition there. Heads port for that board would need to fit in current BIOS region for that motherboard. And Heads would need to have, just as for legacy boards, a FLASHROM statement in board config stating which regions are upgrdeable, and provided, in built rom.
I have not looked at the specific platform, but I guess they provice EC, BIOS, ME region. And in the BIOS region will be FSP blobs and maybe others. Dissecting manufacturer firmware images would be an interesting first step. I have no clue what they provide, but if laptop goal is to boot also windows, I guess the firwmare image is UEFI compliant, relaying also on ED2K and maybe tianocore.
You can drop your findings here, I'm pretty sure you are not alone:
Getting rid of libgfxinit being questioned right now, since coreboot can setup framebuffer correctly and Linux's simplefb can initialize that framebuffer if exposed and accessed through SYSB. Basically, in that case, Linux takes ownership of graphic framebuffer which is expected to be properly initialized by firmware (efi, vesa compliant both can use vlfb from kexec call and pads the fb base address to be reused) and takes ownership of it. That direction is sexy because all coreboot/uefi boards (linuxboot) would be able to reuse the same base to kexec into final OS, only simplefb needing to be added under Heads kexec patch (simple being the name of the graphic driver).
Additional work needed under fbwhiptail to use that simple buffer without screen tearing, corruption or error as of today. Otherwise, whiptail without linear buffer can be used today (used for server boards under BMC: console based output without DRM needed on both remote serial and local VGA adapter) in current tests (but not qemu-coreboot boards, not sure why yet...) and permits to kexec into final OS which is expected to provide proper graphic kernel drivers (fb+DRM).
Any updates @Hacksawfred3232 ? Need more info?
Question is always: who has hardware, who will pay for the initial port and/or provide board if not done by themselves and who will support/test/pay for the maintenance of the board if not done by themselves in the long run. :)
I support the xx20/xx30 since they are really similar, own a Talos II which I'm pushing forward and have a deep love for the kgpe-d16 which is the most free x86 we still own today, even if mine doesn't boot anymore and needs physical troubleshoot and a bit if love right now. Other boards: should be brang to life by the ones believing in those boards or otherwise pay for the post and maintenance.
Extensive answer given at https://github.com/StarLabsLtd/firmware/issues/104#issuecomment-1565458070
Referencing: https://github.com/StarLabsLtd/firmware/issues/104 I would like to see if Heads can be ported to the Starbook MkVI, and wondering what would need to be patched/changed in order to do so. Starlabs Coreboot firmware is located here: https://github.com/StarLabsLtd/coreboot
Already had a look over the documentation and parts of the code for Heads.
I've noted that there are some references to a 32bit compiler, despite most modern systems being 64bit. Why is this the case?
I also saw that on the wiki, the maximized ROM version requires all regions to be unlocked. Why is this required?